Datasheet

sw drv sw sw
sw
Ipk × Vin × f × R × (Qgd + Qgs )
Psw = = 0.26W
Vgtdrv
P
SWcond
+
ǒ
I
SWrms
Ǔ
2
R
DS(on)
(sw) + 0.65 W
I
SWrms
+ D
ǒ
I
OUT
2
)
I
RIPPLE
2
12
Ǔ
Ǹ
+ 7.07 A
RMS_CIN OUT
I = D × (1 - D) × I
V
RIPPLE(CinESR)
ESR =
Cin
1
I + I
OUT RIPPLE
2
I × V
OUT OUT
C =
IN(min)
V × V × f
RIPPLE(CIN) IN SW
æ ö
ç ÷
è ø
RIPPLE
RIPPLE(TotOUT)
RIPPLE(TotOUT) RIPPLE(COUT)
OUT SW
Co
RIPPLE RIPPLE
I
V -
V - V
8×C × f
ESR = =
I I
TPS40140
SLUS660H SEPTEMBER 2005REVISED JUNE 2013
www.ti.com
(24)
With 880-μF output capacitance, the ripple voltage at the capacitor is calculated to be 863-μV. In the
specification, the output ripple voltage should be less than 30 mV, so based on Equation 24, the required
maximum ESR is 9.5 m. The selected capacitors can meet this requirement.
6.1.3 Step 3: Input Capacitor Selection
The input voltage ripple depends on the input capacitance and the ESR. The minimum capacitor and the
maximum ESR can be estimated by:
(25)
(26)
For this design, assume V
RIPPLE(CIN)
is 100 mV and V
RIPPLE(CinESR)
is 50 mV, so the calculated minimum
capacitance is 50μF and the maximum ESR is 2.3 m. Choosing four 22-μF, 16-V, 2-m ESR ceramic
capacitors meets this requirement.
Another important consideration for the input capacitor is the RMS ripple current rating. The RMS current
in the input capacitor is estimated by:
(27)
D is the duty cycle. The calculated RMS current is 6.6 A. Each selected ceramic capacitor has a RMS
current rating of 4.3 A, so it is sufficient to reach this requirement.
6.1.4 Step 4: MOSFET Selection
The MOSFET selection determines the converter efficiency. In this design, the duty cycle is very small so
that the high-side MOSFET is dominated with switching losses and the low-side MOSFET is dominated
with conduction loss. To optimize the efficiency, choose smaller gate charge for the high-side MOSFET
and smaller R
DS(on)
for the low-side MOSFET.
The RENESAS RJK0305 and RJK0301 are selected as the high-side and low-side MOSFETs
respectively. To reduce the conduction loss, two RJK0301 components are used.
The power losses in the high-side MOSFET is calculated with the following equations:
The RMS current in the high side MOSFET is show in Equation 28.
(28)
The R
DS(on)
is 13 m when the MOSFET gate voltage is 4.5 V.
The conduction loss is:
(29)
The switching loss is:
(30)
44 DESIGN EXAMPLES Copyright © 2005–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TPS40140