Datasheet

CLKIOPHSEL
TPS40140
MASTER
20 µA
TPS40140
www.ti.com SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013
Two ICs could also be configured as a 2-phase, single output master and a slave which has two
independent outputs, but is synchronized with the master controller clock. The configuration is shown in
Table 5-5.
Table 5-5. TPS40140 Two-Device, 2-Phase Master and a Dual-Output Slave Configuration
DEVICE PIN, MASTER MASTER, 2 PHASE DEVICE PIN, SLAVE SLAVE, DUAL OUTPUT
COMP1 TO NETWORK COMP1 TO NETWORK
COMP2 COMP1 COMP2 TO NETWORK
TRK1 TO SS CAPACITOR TRK1 TO SS CAPACITOR
TRK2 TO BP5 TRK2 TO SS CAPACITOR
ILIM1 TO SET RESISTORS ILIM1 TO SET RESISTORS
ILIM2 GND ILIM2 TO SET RESISTORS
FB1 TO NETWORK FB1 TO NETWORK
FB2 GND FB2 TO NETWORK
PHSEL 39-kΩ TO GND PHSEL GND
PGOOD1 TO PULL-UP RESISTOR PGOOD1 TO PULL-UP RESISTOR
PGOOD1 TO PULL-UP RESISTOR PGOOD1 TO PULL-UP RESISTOR
CLKIO TO SLAVE, CLKIO CLKIO TO MASTER, CLKIO
5.27.3 CLOCK MASTER, PHSEL AND CLKIO CONFIGURATIONS
The clock synchronization between the master and the slave controller(s) is implemented in a simple
configuration of series 39-kΩ resistors. There is a 20-μA current source from the PHSEL pin of the master
controller. Depending on the number of slave controllers connected, the slave controllers selects the
proper delay from the master CLKIO signal to accomplish phase interleaving. On a given master or slave
controller, the two phases are always 180° out-of-phase.
The CLKIO signal has either six or eight clocks for each cycle of the switching period.
For maximum flexibility the master and slave controllers can be either in a 2-phase configuration or a Dual
output configuration
5.27.3.1 One Device Operation
The basic configuration of a single device is shown in Figure 5-14.
Figure 5-14. Single Controller Only, Two Phases
Copyright © 2005–2013, Texas Instruments Incorporated APPLICATION INFORMATION 33
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