Datasheet
5.12)RI(V
V
V
RAMPCOMP
SNSPEAKSHR
IN
OUT
´´++´=
SHR
IN
OUT
e
V
V
V
RAMPV +´=
5.12)RI(VCOMP
SNSPEAKe
´´+=
Error
Amplifier
PWM
CSn
Ramp
U1
VSHARE
CS gain = 12. 5
COMP
CSRTn
R
SNS
V
OUT
I
OUT
U2
U3
U4
U5
U6
20 µA
U7
Overcurrent
+
+
–
+
+
+
+
R2
R1
ILIM
V
OUT
0.5 V
0 V
+
1.8 V
UDG-12122
Ve
+ V
C
–
TPS40140
SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013
www.ti.com
Figure 5-8. Output Current Sensing and Overcurrent Detection
The output current, I
OUT
, flows through R
SNS
and develops a voltage, V
C
across it, representative of the
output current. The voltage, V
C
, could also be derived from an R-C network in parallel with the output
inductor. This voltage is amplified with a gain of 12.5 and then subtracted from the Error Amp output,
COMP, to generate the V
e
voltage. The V
e
signal is compared to the slope-compensation RAMP signal to
generate the PWM for the modulator. As the output current is increased, the amplified V
C
causes the V
e
signal to decrease. In order to maintain the proper duty cycle (PWM), the COMP signal must increase.
Therefore the magnitude of the COMP signal contains the output current information:
(8)
This is integral in the overcurrent detection as can be seen at comparator U7, comparing the I
LIM
voltage
with COMP. In order to have the proper duty cycle at PWM, V
e
is shown in Equation 9.
(9)
Combining equations:
(10)
Equation 10 shows the reason for resistors R1 and R2 being tied to V
SHR
and V
OUT
respectively.
5.24 CURRENT SENSING AND BALANCING
The controller employs peak current mode control scheme, thus naturally provides certain degree of
current balancing. With current mode, the level of current feedback should comply with certain guidelines
depending on duty factor known as “slope compensation” to avoid the sub-harmonic instability. This
requirement can prohibit achieving a higher degree of phase current balance. To avoid the controversy, a
separate current loop that forces phase currents to match is added to the proprietary control scheme. This
effectively provides high degree of current sharing independent of the controller’s small signal response
and is implemented in U3 and U22, ICTLR.
24 APPLICATION INFORMATION Copyright © 2005–2013, Texas Instruments Incorporated
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