Datasheet

TPS40140
SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013 www.ti.com
5.15 CLKFLT, CLKIO PIN FAULT
1 INTRODUCTION ......................................... 1
5.16 PHSEL PIN FAULT
1.1 FEATURES .......................................... 1
5.17 OVERTEMPERATURE
1.2 APPLICATIONS ..................................... 1
5.18 FAULT MASKING OPERATION
1.3 DESCRIPTION ...................................... 1
5.19 PROTECTION AND FAULT MODES
1.4 ORDERING INFORMATION ........................ 1
5.20 SETTING THE SWITCHING FREQUENCY
2 DEVICE RATINGS ....................................... 3
5.21 SYNCHRONIZING A SINGLE CONTROLLER TO
2.1 ABSOLUTE MAXIMUM RATINGS .................. 3
AN EXTERNAL CLOCK
2.2 RECOMMENDED OPERATING CONDITIONS ..... 3
5.22 SPLIT INPUT VOLTAGE OPERATION
2.3 THERMAL INFORMATION .......................... 3 5.23 CURRENT SENSE
5.24 CURRENT SENSING AND BALANCING
2.4 ELECTRICAL CHARACTERISTICS ................. 5
5.25 OVERCURRENT DETECTION AND HICCUP
3 TYPICAL CHARACTERISTICS ........................ 8
MODE
4 DEVICE INFORMATION ............................... 12
5.26 CALCULATING OVERCURRENT PROTECTION
4.1 TERMINAL CONFIGURATION .................... 12
LEVEL
4.2 CLOCK MASTER AND CLOCK SLAVE ........... 12
5.27 CONFIGURING SINGLE AND MULTIPLE ICS
4.3 VOLTAGE MASTER AND VOLTAGE SLAVE ..... 13
5.28 DIGITAL CLOCK SYNCHRONIZATION
4.4 FUNCTIONAL BLOCK DIAGRAM
5.29 DESIGN EXAMPLES INFORMATION
5 APPLICATION INFORMATION
6 DESIGN EXAMPLES
5.1 FUNCTIONAL DESCRIPTION
6.1 Example 1: Dual-Output Configuration from 12 V to
3.3 V and 1.5 V DC-to-DC Converter Using a
5.2 DATA SHEET ORGANIZATION
TPS40140
5.3 TYPICAL START UP SEQUENCE
6.2 Example 2: Two-Phase Single Output Configuration
5.4 TRACK (SOFT-START WITHOUT PRE-BIASED
From 12 V to 1.5 V DC/DC Converter Using a
OUTPUT)
TPS40140
5.5 SOFT-START WITH PRE-BIASED OUTPUTS
6.3 Example 3: Four-Phase Single Output Configuration
5.6 TRACK FUNCTION IN CONFIGURING A SLAVE
From 12 V to 1.8 V DC-to-DC Converter Using Two
CHANNEL
TPS40140
5.7 DIFFERENTIAL AMPLIFIER, U9
6.4 ABBREVIATIONS
5.8 POWER GOOD
6.5 LAYOUT CONSIDERATIONS
5.9 SETTING THE OUTPUT VOLTAGE
7 ADDITIONAL REFERENCES
5.10 PROGRAMMABLE INPUT UNDERVOLTAGE
7.1 Related Devices
LOCK OUT PROTECTION
7.2 References
5.11 POWER ON RESET (POR)
7.3 Package Outline
5.12 OVERCURRENT
7.4 Recommended PCB Footprint
5.13 OUTPUT UNDERVOLTAGE PROTECTION
REVISION HISTORY
5.14 OUTPUT OVERVOLTAGE PROTECTION
2 Contents Copyright © 2005–2013, Texas Instruments Incorporated
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