Datasheet

17
8
31
32
27
26
25
24
VDD
BP5
CS1
CSRT1
BOOT1
HDRV1
SW1
LDRV1
TPS40140
34
2
3
1
ILIM1
VOUT
GSNS
DIFFO
36
33
35
9
FB1
TRK1
COMP1
FB2
12
10
14
13
TRK2
COMP2
CS2
CSRT2
11
29
16
5
ILIM2
UVLO_CE1
UVLO_CE2
RT
4PHSEL
U1
V5REG
U3
ICTLR1
+
U2
OC1
+
U9
0.7 V
VREF
+
+
U10
U13
6 mA
to
12 mA
0.7 V
VREF
+
+
U14
U20
U11
–
+
U15
U22
ICTLR2
+
U21
6 mA
to
12 mA
OC2
U27
PGOOD
Control
U23
UV/OV/OC
Control
FB1
FB2
OC1
OC2
U4
RAMP1
+
U25
CLOCK
TRK1
TRK2
FB1
FB2
U16
RAMP2
U26
RAMP GEN
MCLK
PWM1
U6
PWM
Logic
PWM2
U5
+
–
+
U17
U7
Anti
Cross
Conduction
U18
Anti
Cross
Conduction
U8
21 VREG
18
19
20
BOOT2
HDRV2
SW2
U19
23 PGND
VREG
U12
22 LDRV2
VREG
U24
30
15
6
PGOOD1
PGOOD2
VSHARE
7 GND
CLKIO28
RAMP1
RAMP2
1.8 V
UDG-08198
TPS40140
www.ti.com SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013
4.4 FUNCTIONAL BLOCK DIAGRAM
Copyright © 2005–2013, Texas Instruments Incorporated DEVICE INFORMATION 15
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