Datasheet

TPS40140

www.ti.com

SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013

5.27.2 MULTIPLE ICs

In a multiple device system it is often desirable to synchronize the clocks each device to minimize input

ripple current as well as radiated and conducted emissions. This is accomplished by designating one of

the controllers as the 'master' and the other devices as 'slaves'. The master generates the system clock,

CLKIO , and it is distributed to the slaves. This is the most useful configuration of multiple devices and the

one that is demonstrated in this data sheet. It is described in more detail in the ' clock master, PHSEL

AND CLKIO Configurations' section.

To increase the total current capability, or number of outputs, a single slave controller can be added to a

master controller as shown in Figure 5-15. The configuration of the 2-phase master and a 2-phase slave

controller is also shown in Table 5-4 It is possible to have the master controller operate on one switching

frequency and the slave controllers on another, independent frequency. In a multi-phase system the slave

controllers would continue to share load current with the master. This is not a preferred configuration and

is mentioned here only for completeness.

The 10-kΩ resistor connected from the CLKIO line to GND is required to ensure that the CLKIO line falls

to GND quickly when the master device is shutdown or powers off. The master CLKIO pin goes to a high

impedance state at these times and if the CLKIO line was high, there is no other active discharge part.

The slave controllers look at the CLKIO line to determine if the system is supposed to be running or not. A

level below 0.5 V on CLKIO is required for this purpose.

NOTE

In any system configured to have a CLK master and CLK slaves, a 10-kΩ resistor connected

from CLKIO to GND is required.

Table 5-4. TPS40140 Two-Device, 4-Phase Mode Selection and Pin Configuration

DEVICE PIN, MASTER, 2-PHASE DEVICE PIN, SLAVE, 2-PHASE

MASTER SLAVE

COMP1 TO NETWORK COMP1 TO MASTER, COMP1

COMP2 COMP1 COMP2 TO MASTER, COMP1

TRK1 TO SS CAPACITOR TRK1 TO BP5

TRK2 TO BP5 TRK2 TO BP5

ILIM1 TO SET RESISTORS ILIM1 GND

ILIM2 GND ILIM2 GND

FB1 TO NETWORK FB1 GND

FB2 GND FB2 GND

PHSEL 39-kΩ TO GND PHSEL GND

PGOOD1 TO PULL-UP RESISTOR PGOOD1 TO PULL-UP RESISTOR

CLKIO TO SLAVE, CLKIO CLKIO TO MASTER, CLKIO

VSHARE TO SLAVE, VSHARE VSHARE TO MASTER, VSHARE

BP5 TO SLAVE, BP5 BP5 TO MASTER, BP5

DESIGN HINT

TI recommends adding a 220-pF ceramic capacitor in parallel with the PHSEL resistor string.

This capacitor is connected from the PHSEL pin of the master control to GND.

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