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Overvoltage Protection
Output Undervoltage Protection
Programmable Input Undervoltage Lockout Protection
Power-On Reset (POR)
Fault Masking Operation
Fault Conditions and MOSFET Control
TPS40130
SLUS602B – JUNE 2004 – REVISED SEPTEMBER 2005
FUNCTIONAL DESCRIPTION (continued)
After the device is enabled and prior to the IC starting (during the first 32 clock cycles), a 5-µA current flows out
of the CS1 and CS2 pins. The current flows through the external components: current sense resistor, R
CS
, the
output inductor and the output capacitor(s) to ground. If the voltage on the CS1 and CS2 pins exceed 0.2 V
(resistance greater than 40 k Ω ), a fault is declared and the device does not start. This is a fault detection feature
that insures the output inductor, current sense resistor and output capacitors are installed properly on the board.
The voltage on OVSET is compared with 0.817 V, 16% higher than VREF, in U25 to determine the output
overvoltage point. When an overvoltage is detected, the output drivers command the upper MOSFETs off and
the lower MOSFETs on. If the overvoltage is caused by a shorted upper MOSFET, latching on the lower
MOSFET should blow the input fuse and protect the output. Hiccup mode consisting of seven (7) soft-start
timing cycles is initiated and then attempts to restart. If the overvoltage condition has been cleared and the input
fuse has not opened, the output comes up and normal operation continues. If the overvoltage condition persists,
the controller restarts to allow the output to rise to the overvoltage level and return to the hiccup mode. Using a
voltage divider with the same ratio, that sets the output voltage, an output overvoltage is declared when the
output rises 16% above nominal.
If the output voltage, as sensed by U19 on the FB pin becomes less than 0.588 V, the undervoltage protection
threshold (84% of VREF), the controller enters the hiccup mode as it is described in the Overcurrent Protection
section.
A voltage divider that sets 1V on the UVLO pin determines when the controller starts operating. Operation
commences when the voltage on the UVLO pin exceeds 1.0 V.
The power-on reset (POR) function, U22, insures the VIN5 and BP5 voltages are within their regulation windows
before the controller is allowed to start.
If the SS pin voltage is externally limited below the 1-V threshold, the controller does not respond to most faults
and the PGOOD output is always low. Only the overcurrent function and current sense fault remain active. The
overcurrent protection still continues to terminate PWM cycle every time when the threshold is exceeded but the
hiccup mode is not entered.
Table 1 shows a summary of the fault conditions and the state of the MOSFETs.
Table 1. Fault Condifions
FAULT MODE UPPER MOSFET LOWER MOSFET
EN/SYNC = LOW OFF OFF
FIXED UVLO, V
BP5
< 4.25 V OFF OFF
Programmable UVLO, < 1.0 V OFF ON
Output undervoltage OFF, Hiccup mode ON, Hiccup mode
Output overvoltage OFF, Hiccup mode ON, Hiccup mode
ISF, current sense fault OFF ON
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