Datasheet

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+
+
C4
+
+
L
ISNS
+
X2
+
R
LOAD
R
CESR
C
OUT
R
LDC
C
SFLT
R
SFLT
gm
CSA
R
EA
20 kΩ
R
BIAS
R
4
R
5
R
1
R
3
C
3
C
1
C
2
R
2
V
IN
UDG−04147
V
OUT
V
X
Programming Soft-Start Time
C
SS
+ T
SS
20 mA
V
FB
F
(46)
TPS40100
SLUS601–MAY 2005
APPLICATION INFORMATION (continued)
Figure 13. AC Behavioral Model for Tracking Control Loop
To use the model, the AC voltage source is swept over the frequency range of interest. The open loop ac
response is V
X
/V
OUT
.
The soft-start time of the TPS40100 is fully user programmable by selecting a single capacitor. The SS pin
sources 20 µA to charge this capacitor. The actual output ramp-up time is the amount of time that it takes for the
20 µA to charge the capacitor through a 690 mV range. There is some initial lag due to an offset from the actual
SS pin voltage to the voltage applied to the error amplifier. See Figure 15. The soft-start is done in a closed loop
fashion, meaning that the error amplifier controls the output voltage at all times during the soft start period and
the feedback loop is never open as occurs in duty cycle limit soft-start schemes. The error amplifier has two
non-inverting inputs, one connected to the 690 mV reference voltage, and one connected to the offset SS pin
voltage. The lower of these two voltages is what the error amplifier controls the FB pin to. As the voltage on the
SS pin ramps up past approximately 1.04 V (resulting in 690 mV at the SS “+” input – See Figure 15), the 690
mV reference voltage becomes the dominant input and the converter has reached its final regulation voltage.
The capacitor required for a given soft-start ramp time for the output voltage is given by:
where
• T
SS
is the desired soft-start ramp time (s)
• C
SS
is the required capacitance on the SS pin (F)
• V
FB
is the reference voltage feedback loop (690 mV)
22