Datasheet
www.ti.com
f
LC_Pole
+
1
2p L C
O
Ǹ
+ 3559 Hz
(47)
f
ESR_Zero
+
1
2p ESR C
O
+ 8377 Hz
(48)
100 100 k10 k1 k 1 M
−40
−50
10
−20
−10
20
30
0
−60
Frequency − Hz
Gain − dB
ESR = 0 Ω
Slope = −40 dB / decade
ESR = 0.0095 Ω
Slope = −20 dB / decade
Double Pole
ESR Zero
R
P1
2 SAO
TPS40075
5
6
FB
COMP
UDG−04126
C
PZ1
R
Z1
R
PZ2
C
P2
C
Z2
R
SET2
R
SET1
TPS40075
SLUS676A – MAY 2006 – REVISED SEPTEMBER 2007
The resulting bode plot is shown in Figure 30 .
Figure 30. PWM and LC Filter Gain
The next step is to establish the required compensation gain to achieve the desired overall system response.
The target response is to have the crossover frequency between 1/10 to 1/4 times the switching frequency. To
have a phase margin greater than 45 ° and a gain margin greater than 6 dB.
A Type III compensation network, as shown in Figure 31 , was used for this design. This network gives the best
overall flexibility for compensating the converter.
Figure 31. Type III Conpensation with TPS40075
Copyright © 2006 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 31
Product Folder Link(s) :TPS40075