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C
BOOST
u
Q
g(TOTAL)
DV
BOOST
(42)
K
PWM
^
V
UVLO
1 V
(43)
K
LC
+
ǒ
1 ) s ESR C
O
Ǔ
1 ) s
ǒ
L
R
LOAD
Ǔ
) s
2
L C
O
(44)
G
e
(s) + K
PWM
K
LC
+
V
UVLO
1 V
ǒ
1 ) s ESR C
O
Ǔ
1 ) s
ǒ
L
R
LOAD
Ǔ
) s
2
L C
O
(45)
DCGAIN + 20 LOG
ǒ
V
UVLO
1 V
Ǔ
+ 20 LOG(8.752) + 18.8 dB
(46)
TPS40075
SLUS676A – MAY 2006 – REVISED SEPTEMBER 2007
3.2.5 Voltage Decoupling Capacitors, C
DBP
, C
LVBP
and C
VDD
Several pins on the TPS40075 have DC voltages. It is recommended to add small decoupling capacitors to these
pins. Below is a list of the recommended values.
• C
DBP
= 1.0 μ F
• C
LVBP
= 0.1 μ F
• C
VDD
= 4.7 μ F
3.2.6 Boost Voltage, C
BOOST
and D
BOOST
(optional)
A capacitor charge pump or boost circuit is required to drive an N-channel MOSFET in the switch location of a
buck converter . The TPS40075 contains the elements for this boost circuit. The designer just has to add a
capacitor, C
BOOST
, from the switch node of the buck power stage to the BOOST pin of the device. Selection of
this capacitor is based on the total gate charge of the switching MOSFET and the allowable ripple on the boost
voltage, Δ V
BOOST
. A ripple of 0.15 V is assumed for this design. Using these two parameters and Equation 42 the
minimum value for C
BOOST
can be calculated.
The total gate charge of the switching MOSFET is 13.3 nC. A minimum C
BOOST
of 0.089 μ F is required. A 0.1 μ F
capacitor was chosen.
This capacitor must be able to withstand the maximum voltage on DBP (10 V in this instance ). A 50 V capacitor
is used for expediancy.
To reduce losses in the TPS40075 and to increase the available gate voltage for the switching MOSFET an
external diode can be added between the DBP pin and the BOOST pin of the device. A small signal schottky
should be used here, such as the BAT54.
3.3 Closing the Feedback Loop, R
Z1
, R
P1
, R
PZ2
, R
SET1
, R
SET2
, C
Z2
, C
P2
and C
PZ1
A graphical method is used to select the compensation components. This is a standard feedforward buck
converter. Its PWM gain is shown in Equation 43 .
The gain of the output L-C filter is given by Equation 44
The PWM and LC gain is, shown in Equation 45 .
To describe this in a Bode plot, the DC gain must be expressed in dB. The DC gain is equal to K
PWM
. To express
this in dB we take its LOG and multiple by 20. For this converter the DC gain is shown in Equation 46 .
The pole and zero frequencies should be calculated, also. A double pole is associated with the L-C and a zero is
associated with the ESR of the output capacitor. The frequency at where these occur can be calculated using the
following two equations.
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