Datasheet

R
ILIM
+
I
OC
R
DS(on)[max]
I
SINK
)
V
OS
I
SINK
(W)
( )
( )
O O
LIM LOAD
START
C V
I I A
t
é ù
´
= +
ê ú
ë û
TPS40060
TPS40061
www.ti.com SLUS543F –DECEMBER 2002–REVISED JUNE 2013
PROGRAMMING CURRENT LIMIT
This device uses a two-tier approach for overcurrent protection. The first tier is a pulse-by-pulse protection
scheme. Current limit is implemented on the high-side MOSFET by sensing the voltage drop across the
MOSFET when the gate is driven low. The MOSFET voltage is compared to the voltage dropped across a
resistor connected from VIN pin to the ILIM pin when driven by a constant current sink. If the voltage drop across
the MOSFET exceeds the voltage drop across the ILIM resistor, the switching pulse is immediately terminated.
The MOSFET remains off until the next switching cycle is initiated.
The second tier consists of a fault counter. The fault counter is incremented on an overcurrent pulse and
decremented on a clock cycle without an overcurrent pulse. When the counter reaches seven (7) a restart is
issued and seven soft-start cycles are initiated. Both the upper and lower MOSFETs are turned off during this
period. The counter is decremented on each soft-start cycle. When the counter is decremented to zero, the PWM
is re-enabled. If the fault has been removed the output starts up normally. If the output is still present the counter
counts seven overcurrent pulses and re-enters the second-tier fault mode. See Figure 7 for typical overcurrent
protection waveforms.
The minimum current limit setpoint (I
LIM
) depends on t
START
, C
O
, V
O
, and the load current at start-up (I
LOAD
).
(6)
The current limit programming resistor (R
ILIM
) is calculated using Equation 7. Care must be taken in choosing the
values used for V
OS
and I
SINK
in the equation. In order to ensure the output current at the overcurrent level, the
minimum value of I
SINK
and the maximum value of V
OS
must be used.
where:
• I
SINK
is the current into the ILIM pin and is nominally 8.3 µA, minimum
• I
OC
is the overcurrent setpoint which is the DC output current plus one-half of the peak inductor current
• V
OS
is the overcurrent comparator offset and is 50 mV maximum (7)
BP5, BP10 AND BPN10 INTERNAL VOLTAGE REGULATOR
Start-up characteristics of the BP5, BP10 and BPN10 regulators are shown in Figure 7. Slight variations in the
BP5 occurs dependent upon the switching frequency. Variation in the BPN10 and BP10 regulation characteristics
is also based on the load presented by switching the external MOSFETs.
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