Datasheet

C
SS
+
2.3 mA
0.7 V
t
START
(Farads)
t
START
w 2p L C
O
Ǹ
(seconds)
TPS40060
TPS40061
SLUS543F –DECEMBER 2002–REVISED JUNE 2013 www.ti.com
The impedance of the input voltage can cause the input voltage, at the TPS4006x, to sag when the converter
starts to operate and draw current from the input source. Therefore, there is voltage hysteresis that prevents
nuisance shutdowns at the UVLO point.
With RT chosen to select the operating frequency and RKFF chosen to select the start-up voltage, the amount of
hysteresis voltage is shown in Figure 5.
PROGRAMMING SOFT START
TPS4006x uses a closed-loop approach to ensure a controlled ramp on the output during start-up. Soft-start is
programmed by charging an external capacitor (C
SS
) via an internally generated current source. The voltage on
C
SS
minus 0.85 V, is fed into a separate non-inverting input to the error amplifier (in addition to FB and 0.7-V
V
REF
). The loop is closed on the lower of the (V
CSS
– 0.85 V) voltage or the internal reference voltage (0.7-V
V
REF
). Once the (V
CSS
– 0.85 V) voltage rises above the internal reference voltage, regulation is based on the
internal reference. To ensure a controlled ramp-up of the output voltage the soft-start time should be greater than
the L-C
O
time constant as described in Equation 4.
(4)
There is a direct correlation between t
START
and the input current required during start-up. The faster t
START
, the
higher the input current required during start-up. This relationship is describe in more detail in the section titled,
Programming the Current Limit, which follows. The soft-start capacitance, C
SS
, is described in Equation 5.
For applications in which the V
IN
supply ramps up slowly, (typically between 50 ms and 100 ms) it may be
necessary to increase the soft-start time to between approximately 2 ms and 5 ms to prevent nuisance UVLO
tripping. The soft-start time should be longer than the time that the V
IN
supply transitions between 6 V and 7 V.
(5)
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