Datasheet

TPS40060
TPS40061
www.ti.com SLUS543F –DECEMBER 2002–REVISED JUNE 2013
Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME NO.
5-V reference. This pin should be bypassed to ground with a 0.1-µF ceramic capacitor. This pin may be used with
BP5 3 O
an external DC load of 1 mA or less.
10-V reference used for gate drive of the N-channel synchronous rectifier. This pin should be bypassed by a 1-µF
BP10 11 O
ceramic capacitor. This pin may be used with an external DC load of 1 mA or less.
Negative 8-V reference with respect to VIN. This voltage is used to provide gate drive for the high side P-channel
BPN10 13 O
MOSFET. This pin should be bypassed to VIN with a 0.1-µF capacitor
Output of the error amplifier, input to the PWM comparator. A feedback network is connected from this pin to the
COMP 8 I VFB pin to compensate the overall loop. The comp pin is internally clamped above the peak of the ramp to
improve large signal transient response.
Floating gate drive for the high-side P-channel MOSFET. This pin switches from VIN (MOSFET off) to BPN10
HDRV 14 O
(MOSFET on).
Current limit pin, used to set the overcurrent threshold. An internal current sink from this pin to ground sets a
ILIM 16 I voltage drop across an external resistor connected from this pin to VIN. The voltage on this pin is compared to the
voltage drop (VIN -SW) across the high side MOSFET during conduction.
A resistor is connected from this pin to VIN to program the amount of voltage feed-forward. The current fed into
KFF 1 I
this pin is internally divided and used to control the slope of the PWM ramp.
Gate drive for the N-channel synchronous rectifier. This pin switches from BP10 (MOSFET on) to ground
LDRV 10 I
(MOSFET off).
Power ground reference for the device. There should be a low-impedance connection from this point to the source
PGND 9
of the power MOSFET.
A resistor is connected from this pin to ground to set the internal oscillator ramp charging current and switching
RT 2 I
frequency.
SGND 5 Signal ground reference for the device.
Soft-start programming pin. A capacitor connected from this pin to ground programs the soft-start time. The
capacitor is charged with an internal current source of 2.3 µA. The resulting voltage ramp on the SS pin is used as
a second non-inverting input to the error amplifier. The output voltage begins to rise when V
SS/SD
is approximately
SS/SD 6 I 0.85 V. The output continues to rise and reaches regulation when V
SS/SD
is approximately 1.55 V. The controller is
considered shut down when V
SS/SD
is 125 mV or less. All internal circuitry is inactive. The internal circuitry is
enabled when V
SS/SD
is 210 mV or greater. When V
SS/SD
is less than approximately 0.85 V, the outputs cease
switching and the output voltage (V
OUT
) decays while the internal circuitry remains active.
This pin is connected to the switched node of the converter and used for overcurrent sensing. This pin is used for
SW 12 I
zero current sensing in the TPS40060.
Synchronization input for the device. This pin can be used to synchronize the oscillator to an external master
SYNC 4 I
frequency.
Inverting input to the error amplifier. In normal operation the voltage on this pin is equal to the internal reference
VFB 7 I
voltage, 0.7 V.
VIN 15 I Supply voltage for the device.
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