Datasheet

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SLVS612 − APRIL 2006
5
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TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
BOOST 14 O
Gate drive voltage for the high side N-channel MOSFET. The BOOST voltage is 9 V greater than the input
voltage. A 0.1-µF ceramic capacitor should be connected from this pin to the SW pin.
BP5 3
O
5-V reference. This pin should be bypassed to ground with a 0.1-µF ceramic capacitor. This pin may be used
with an external dc load of 1 mA or less.
BP10 11 O
10-V reference used for gate drive of the N-channel synchronous rectifier. This pin should be bypassed by a 1-µF
ceramic capacitor. This pin may be used with an external dc load of 1 mA or less.
COMP 8 O
Output of the error amplifier, input to the PWM comparator. A feedback network is connected from this pin to the
VFB pin to compensate the overall loop. The comp pin is internally clamped above the peak of the ramp to
improve large signal transient response.
HDRV 13 O
Floating gate drive for the high-side N-channel MOSFET. This pin switches from BOOST (MOSFET on) to SW
(MOSFET off).
ILIM 16 I
Current limit pin, used to set the overcurrent threshold. An internal current sink from this pin to ground sets a
voltage drop across an external resistor connected from this pin to VCC. The voltage on this pin is compared
to the voltage drop (VIN −SW) across the high side MOSFET during conduction.
EA_REF 4 I Non-inverting input to the error amplifier and used as the reference for the feedback loop.
LDRV 10 O
Gate drive for the N-channel synchronous rectifier. This pin switches from BP10 (MOSFET on) to ground
(MOSFET off).
PGND 9 −
Power ground reference for the device. There should be a low-impedance path from this pin to the source(s)
of the lower MOSFET(s).
RT 2 I A resistor is connected from this pin to ground to set the internal oscillator and switching frequency.
SGND 5 − Signal ground reference for the device.
SS/SD 6 I
Soft-start programming pin. A capacitor connected from this pin to ground programs the soft-start time. The
capacitor is charged with an internal current source of 2.3 µA. The resulting voltage ramp on the SS pin is used
as a second non-inverting input to the error amplifier. Output voltage regulation is controlled by the SS voltage
ramp until the voltage on the SS pin reaches the internal reference voltage , EA_REF V. Pulling this pin low
disables the controller.
SW 12 I This pin is connected to the switched node of the converter and used for overcurrent sensing.
SYNC 1 I
Syncronization input for the device. This pin can be used to synchronize the oscillator to an external master
frequency. If synchronization is not used, connect this pin to SGND.
VFB 7 I
Inverting input to the error amplifier. In normal operation the voltage on this pin is equal to the EA_REF reference
voltage.
VIN 15 I Supply voltage for the device.