Datasheet

( )
( )
KFF IN(min) KFF T
R V V 58.14 R 1340= - ´ ´ + W
V
PEAK
V
VALLEY
t
ON1
> t
ON2
and D
1
> D
2
t
2
t
ON2
t
1
t
ON1
V
IN
RAMP
COMP
SW
D =
t
ON
t
UDG-08119
R
T
+
ǒ
1
f
SW
17.82 10
*6
* 17
Ǔ
kW
TPS40054
TPS40055
TPS40057
www.ti.com SLUS593H –DECEMBER 2003–REVISED JULY 2012
APPLICATION INFORMATION
The TPS40054/55/57 family of devices allows the user to optimize the PWM controller to the specific application.
The TPS40057 is safe for pre-biased outputs, not turning on the synchronous rectifier until the high-side FET has
already started switching.
The TPS40054 operates in one quadrant and sources output current only, allowing for paralleling of converters
and ensures that one converter does not sink current from another converter. This controller also emulates a
non-synchronous buck converter at light loads where the inductor current goes discontinuous. At continuous
output inductor currents the controller operates as a synchronous buck converter to optimize efficiency.
The TPS40055 operates in two quadrants, sourcing and sinking output current.
SETTING THE SWITCHING FREQUENCY (PROGRAMMING THE CLOCK OSCILLATOR)
The TPS4005x has independent clock oscillator and ramp generator circuits. The clock oscillator serves as the
master clock to the ramp generator circuit. The switching frequency, f
SW
in kHz, of the clock oscillator is set by a
single resistor (R
T
) to ground. The clock frequency is related to R
T
, in kΩ by Equation 1 and the relationship is
charted in Figure 2.
(1)
PROGRAMMING THE RAMP GENERATOR CIRCUIT
The ramp generator circuit provides the actual ramp used by the PWM comparator. The ramp generator provides
voltage feed-forward control by varying the PWM ramp slope with line voltage, while maintaining a constant ramp
magnitude. Varying the PWM ramp directly with line voltage provides excellent response to line variations since
the PWM does not have to wait for loop delays before changing the duty cycle. (See Figure 1).
Figure 1. Voltage Feed-Forward Effect on PWM Duty Cycle
The PWM ramp must be faster than the master clock frequency or the PWM is prevented from starting. The
PWM ramp time is programmed via a single resistor (R
KFF
) pulled up to VIN. R
KFF
is related to R
T
, and the
minimum input voltage, V
IN(min)
through the following:
where
• V
IN(min)
is the ensured minimum start-up voltage (the actual start-up voltage is nominally about 10% lower at
25°C)
• R
T
is the timing resistance in kΩ
Copyright © 2003–2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS40054 TPS40055 TPS40057