Datasheet

D +
V
O
V
IN
+
V
C
V
S
or
V
O
V
C
+
V
IN
V
S
( )
(
)
( )
(
)
KFF KFF
IN min T dummy
R V V 58.14 R 1340= - ´ ´ + W
( )
( )
T dummy
6
SYNC
1
R 17 k
f 17.82 10
-
æ ö
ç ÷
= - W
ç ÷
´ ´
è ø
( )
( )
3
OC OS
DS on max
ILIM
SINK SINK
I R V
42.86 10
R
1.12 I I
-
é ù
ë û
´ +
´
= + W
´
TPS40054
TPS40055
TPS40057
www.ti.com
SLUS593H DECEMBER 2003REVISED JULY 2012
The current limit programming resistor (R
ILIM
) is calculated using Equation 15. Care must be taken in choosing
the values used for V
OS
and I
SINK
in the equation. In order to ensure the output current at the overcurrent level,
the minimum value of I
SINK
and the maximum value of V
OS
must be used. The main purpose is hard fault
protection of the power switches.
where
I
SINK
is the current into the ILIM pin and is 8.5 μA, minimum
I
OC
is the overcurrent setpoint which is the DC output current plus one-half of the peak inductor current
V
OS
is the overcurrent comparator offset and is –20 mV, maximum (15)
SYNCHRONIZING TO AN EXTERNAL SUPPLY
The TPS4005x can be synchronized to an external clock through the SYNC pin. Synchronization occurs on the
falling edge of the SYNC signal. The synchronization frequency should be in the range of 20% to 30% higher
than its programmed free-run frequency. The clock frequency at the SYNC pin replaces the master clock
generated by the oscillator circuit. Pulling the SYNC pin low programs the TPS4005x to freely run at the
frequency programmed by R
T
.
The higher synchronization must be factored in when programming the PWM ramp generator circuit. If the PWM
ramp is interrupted by the SYNC pulse, a UVLO condition is declared and the PWM becomes disabled. Typically
this is of concern under low-line conditions only. In any case, R
KFF
needs to be adjusted for the higher switching
frequency. In order to specify the correct value for R
KFF
at the synchronizing frequency, calculate a dummy value
for R
T
that would cause the oscillator to run at the synchronizing frequency. Do not use this value of RT in the
design.
where
f
SYNC
is the synchronizing frequency in kHz (16)
Use the value of R
T(dummy)
to calculate the value for R
KFF
.
where
R
T(dummy)
is in kΩ (17)
This value of R
KFF
ensures that UVLO is not engaged when operating at the synchronization frequency.
LOOP COMPENSATION
Voltage-mode buck-type converters are typically compensated using Type III networks. Since the TPS4005x
uses voltage feedforward control, the gain of the PWM modulator with voltage feedforward circuit must be
included. The generic modulator gain is described in Figure 10. Duty cycle, D, varies from 0 to 1 as the control
voltage, V
C
, varies from the minimum ramp voltage to the maximum ramp voltage, V
S
. Also, for a synchronous
buck converter, D = V
O
/ V
IN
. To get the control voltage to output voltage modulator gain in terms of the input
voltage and ramp voltage,
(18)
With the voltage feedforward function, the ramp slope is proportional to the input voltage. Therefore the
moderator DC gain is independent to the change of input voltage.
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