Datasheet

1
2
3
4
16
15
14
13
ILIM
VIN
BOOST
HDRV
KFF
RT
BP5
SYNC
TPS40055
5
6
7
8
12
11
10
9
SW
BP10
LDRV
PGND
SGND
SS
VFB
COMP
+
-
+
-
Si7860
PWP
Si7860
*optional
47 pF
1N4150
Optional
Hysteresis for
UVLO
330 mF330 mF
R
KFF
71.5 kW 13 kW
100 pF
0.1 mF
22 mF
50 V
22 mF
50 V
R3
6.49 kW
R1
100 kW
180 mF 180 mF
V
OUT
V
IN
R
BIAS
26.7 kW
1.0 mF
R2
97.6 kW
1.0 mF
C3
330 pF
1.0 kW
C
SS
3300 pF
C1
330 pF
C2
22 pF
R
T
169 kW
2.9 mH
1.0 mF
499 kW
-
TPS40055-EP
www.ti.com SGLS310D –JULY 2005–REVISED FEBRUARY 2012
DESIGN EXAMPLE SUMMARY
Figure 18 shows component selection for the 10-V to 24-V to 3.3-V at 8 A dc-to-dc converter specified in the
design example. For an 8-V input application, it may be necessary to add a Schottky diode from BP10 to BOOST
to get sufficient gate drive for the upper MOSFET. As seen in Figure 9, the BP10 output is about 6 V with the
input at 8 V, so the upper MOSFET gate drive may be less than 5 V.
A Schottky diode is shown connected across the synchronous rectifier MOSFET as an optional device that may
be required if the layout causes excessive negative SW node voltage, greater than or equal to 2 V.
Figure 18. 24 V to 3.3 V at 8-A DC-to-DC Converter Design Example
REFERENCES
1. Balogh, Laszlo, Design and Application Guide for High Speed MOSFET Gate Drive Circuits, Texas
Instruments/Unitrode Corporation, Power Supply Design Seminar, SEM-1400 Topic 2.
2. PowerPAD Thermally Enhanced Package Texas Instruments, Semiconductor Group, Technical Brief
(SLMA002)
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Product Folder Link(s): TPS40055-EP