Datasheet

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3.3.1 Input Voltage Monitoring (TP1 and TP2)
3.3.2 Disable (TP3)
3.3.3 Compensation and Initialization (TP4)
3.3.4 Switching Waveforms (TP5, TP6, TP7, and TP8)
3.3.5 Loop Analysis (TP9, TP10, TP11, and TP12)
Schematic
Table 3. Test Point Descriptions (continued)
TEST POINT LABEL USE SECTION
TP6 SW Monitor switch node 3.3.3 and 3.3.5
TP7 HDRV Monitor high-side gate drive (Q2) 3.3.4
TP8 GND Ground point for LDRV, SW, and HDRV probes 3.3.4
TP9 CH1 Loop injection point and iInjection monitoring point 3.3.4
TP10 GND Ground for loop monitoring probe 3.3.4
TP11 CH2 Loop injection point and output response monitoring point 3.3.5
TP12 GND Ground for loop monitoring probe 3.3.5
TP13 Pre-Bias Injection point to test prebias load compliance 3.3.5
TP14 Vout Monitor output voltage from the module 3.3.5
TP15 GND Monitor output voltage from the module 3.3.6
TPS40040EVM-001 provides two test points for measuring the voltage applied to the module. This allows
the user to measure the actual module voltage without losses from input cables and connector losses. All
input voltage measurements should be made between TP1 and TP2. To use TP1 and TP2, connect a
voltmeter positive terminal to TP1 and negative terminal to TP2.
TPS40040EVM-001 defaults to the Enabled state. Short TP3 to ground to disable the TPS40040
controller. TP4 also can be used as a disable input driven by a 5-V logic input from an external circuit. The
Enable test point uses a 100-k Ω pullup resistor so that the TPS40040EVM-001 turns on if the Enable test
point is left floating.
TPS40040EVM-001 provides a test-point connection to the COMP pin of the TPS40040 controller. This
test point can be used to monitor the COMP voltage during the controller’s Power On initialization that sets
the controllers short-circuit protection (SCP) threshold. The test point also can be used to monitor the
PWM comparator input voltage (COMP) during operation or to measure the power stage gain by following
the loop analysis directions by moving the channel A probe from TP10 to TP6.
TPS40040EVM-001 provides three test points and a local ground connection (TP8) for the monitoring of
the main switching waveforms. Connect an oscilloscope probe to TP7 to monitor the high-side gate drive
applied to the gate of Q2. Connect an oscilloscope probe to TP6 to monitor the switch node voltage. The
gate-to-source voltage (VGS) of the high-side FET can be determined by an oscilloscope math function
TP7–TP6, if both channels use the same scale. Connect an oscilloscope probe to TP5 to monitor the
low-side gate drive applied to the gate of Q3. Because the source of Q3 is connected directly to ground,
no math function is required to determine the gate-to-source voltage of the low-side FET.
TPS40040EVM-001 contains a 49.9- Ω series resistor in the feedback loop to allow for matched
impedance signal injection into the feedback for loop response analysis. An isolation transformer should
be used to apply a small (30-mV or less) signal across R10 through TP9 and TP11. By monitoring the AC
injection level at TP9 and the returned AC level at TP11, the power-supply loop response can be
determined.
6 Using the TPS40040EVM-001: A 12-V Input, 1.8-V Output, 10-A Synchronous Buck Converter SLUU266 – January 2007
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