Datasheet
Table Of Contents
- 1 Introduction
- 2 TPS40040EVM-001 Electrical Performance Specifications
- 3 Schematic
- 4 Test Setup
- 5 TPS40040EVM Typical Performance Data and Characteristic Curves
- 6 EVM Assembly Drawings and Layout
- 7 List of Materials
- Important Notices

www.ti.com
3.1 Adjusting Output Voltage (R5)
V
VOUT
+ V
VREF
R8 ) R5
R5
(1)
3.2 Adjusting Short-Circuit Protection (R2)
3.3 Test Point Descriptions
Schematic
The regulated output voltage can be adjusted within a limited range by changing the ground resistor in the
feedback resistor divider (R5). The output voltage is given by the formula
Where V
VREF
= 0.600 V and R8 = 20 k Ω
Table 1 contains common values for R5 to generate popular output voltages. TPS40040EVM-001 is stable
through these output voltages but the efficiency can suffer as the power stage is optimized for the 1.8-V
output.
Table 1. Adjusting V
OUT
With R7
V
OUT
(V) R5 (k Ω )
2.5 3.64
2.25 7.32
2.0 8.66
1.8 10
1.5 13.3
1.2 20
1.0 30
0.9 40
The values in Table 1 provide less than 1% nominal set-point error in the output voltage. If a tighter
nominal value is required, R4 can be used in parallel with R5 to obtain a wider range of resistor values
using commonly available E96 resistors.
The TPS40040 uses a selectable current limit for short-circuit protection. The current limit is selected from
three levels by placing a resistor at R2. The TPS40040 compares the voltage drop across the high-side
FET (VDD to SW) to an internal reference voltage selected during start-up. The voltage levels are shown
in Table 2 .
Table 2. Adjusting V
SCP
With R9
V
SCP
(mV) R2 (k Ω )
105 402
180 OPEN
300 12
The current before declaring short-circuit protection can be determined by dividing the V
SCP
by the R
DS(ON)
of the high-side FET (Q2).
Table 3. Test Point Descriptions
TEST POINT LABEL USE SECTION
TP1 Vin+ Monitor input voltage to the module 3.3.1
TP2 Vin– Monitor input voltage to the module 3.3.1
TP3 Enable Active-high enable – pull to ground to disable 3.3.2
TP4 COMP Monitor COMP voltage 3.3.2
TP5 LDRV Monitor low-side gate drive (Q3) NA
SLUU266 – January 2007 Using the TPS40040EVM-001: A 12-V Input, 1.8-V Output, 10-A Synchronous Buck Converter 5
Submit Documentation Feedback