Datasheet

VCC
0.9 V
t
SENSE1
VHYS
VIT
t
MR
t
t
RESET
td
td
TPS386596L33
SLVSA75 –JULY 2010 www.ti.com
Figure 3. Timing Diagram
SENSE INPUTS
The SENSEn inputs provide terminals at which the system voltages can be monitored. If the voltage at any one
of the SENSEn pins drops below their respective VITn, then the RESET output is asserted. The comparators
have a built-in hysteresis to ensure smooth RESETtransitions. It is good analog design practice to use a 1nF to
10nF bypass capacitor at the SENSEn input to ground, to reduce sensitivity to transients, layout parasitics, and
interference between power rails monitored by this device.
A typical connection of resistor dividers is show in Figure 4. SENSE1 is used to monitor a 3.3V nominal power
supply voltage with a trip point = 2.90V, and the remaining SENSEn (n=2,3,4) inputs can be used to monitor
voltage rails down to 0.4V. Threshold voltages can be calculated using the following equations.
VCC2_target = (1 + RS2H/RS2L) × 0.4 (V)
VCC3_target = (1 + RS3H/RS3L) × 0.4 (V)
VCC4_target = (1 + RS4H/RS4L) × 0.4 (V)
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