Datasheet

www.ti.com General Operation and Functionality
4.5 Watchdog Timer Function
The TPS3860xx contains a watchdog timer (WDT) which can be evaluated using the
TPS3860xxEVM-736. The watchdog timer times out approximately 600 ms after the last rising or falling
edge seen at WDI (J6), and WDO (J12) is asserted. Once WDO has been asserted, RESET1 must be
asserted in order to reset WDO. This is accomplished when manual reset (J13) is asserted, the SENSE1
voltage drops below the setpoint, or VCC is reset. Figure 3 shows the operation of the watchdog timer.
WDO starts low, indicating a timeout condition, but goes high when RESET1 is asserted by using the MR
input. The WDO pin goes low again 600 ms after the last edge seen at WDI.
Figure 3. WDT Timing and Operation
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SLVU450–March 2011 TPS3860xxEVM-736 Evaluation Modules
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