Datasheet

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General Operation and Functionality
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4.4 RESET Timing Delay
The time delay for each supervisor can be adjusted by the capacitor at the CT1–CT4 pins. The EVM has
been configured with 0.1-µF capacitors on each of these pins for a nominal delay of 413.7 ms. Figure 2
shows the operation of the RESET output with respect to the supervised voltage. The top trace shows
VCC1 as it ramps up from 0 V to 3.3 V and the bottom trace shows the delay before RESET1 goes high.
To change this delay, the following equations from the data sheet can be used to calculate a new timing
capacitor:
(3)
Figure 2. RESET1 Timing for VCC1 From 0 V to 3.3 V
6
TPS3860xxEVM-736 Evaluation Modules SLVU450March 2011
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