Datasheet
10
15
20
25
30
35
40
45
50
0 5 10 15 20 25 30 35
V
DD
voltage drop below V
IT−
(%)
Minimum Pulse Duration Trigger Reset (µs)
Reset Occurs Above Line
G010
Transient
Duration
(t )
W
Transient
Amplitude
V
DD
V
IT-
TPS3831
TPS3839
www.ti.com
SBVS193B –JUNE 2012–REVISED APRIL 2013
APPLICATION INFORMATION
VDD TRANSIENT REJECTION
The TPS383x (TPS3831 and TPS3839) has built-in rejection of fast transients on the VDD pin. Transient
rejection depends on both the duration and amplitude of the transient. Transient amplitude is measured from the
bottom of the transient to the negative threshold voltage (V
IT–
) of the device, as shown in Figure 14.
Figure 14. Voltage Transient Measurement
Figure 15 shows the relationship between the transient amplitude and duration required to trigger a reset. Any
combination of duration and amplitude greater than that shown in Figure 15 generates a reset signal.
Figure 15. TPS3839 Transient Rejection
INPUT CAPACITOR
The TPS383x uses a unique sampling scheme to maintain an extremely low average quiescent current of 150
nA. The TPS383x typically consumes only about 100 nA of dc current. However, this current rises to
approximately 15 µA for around 200 µs while the TPS383x samples the input voltage. If the source impedance
back to the supply voltage is high, then the additional current during sampling may trigger a false reset as a
result of the apparent voltage drop at VDD. For high VDD source or trace impedance applications, it is
recommended to add a small 0.1-µF bypass capacitor near the TPS3839 VDD pin. This bypass capacitor
effectively keeps the average current at 150 nA and reduces the effects of a high-impedance voltage source.
Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: TPS3831 TPS3839