Datasheet
RESET
GND
TPS3839K33
VDD
RST
Microprocessor
3.3 V
V
CC
47 k:
V
DD
GND
TPS3831
20 kW
MR
TPS3831
TPS3839
SBVS193B –JUNE 2012–REVISED APRIL 2013
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MANUAL RESET (MR) INPUT (TPS3831 Only)
The manual reset (MR) input allows a processor, or other logic devices, to initiate a reset (TPS3831 only). A logic
low (0.3 V
DD
) on MR causes RESET to assert. After MR returns to a logic high and V
DD
is greater than the
threshold voltage, RESET is deasserted after the reset delay time, t
d
, elapses. Note that MR is internally tied to
VDD with a 20-kΩ resistor; therefore, this pin can be left unconnected if MR is not used. If a logic signal driving
MR does not go fully to VDD, there will be some additional current draw into VDD as a result of the internal pull-
up resistor on MR. To minimize current draw, a logic-level FET can be used, as illustrated in Figure 16.
Figure 16. Using Logic-Level FET to Minimize Current Draw
BIDIRECTIONAL RESET PINS
Some microcontrollers have bidirectional reset pins that act both as an input and an output. A series resistor
should be placed between the TPS383x output and the microcontroller reset pin to protect against excessive
current flow when both the TPS383x and the microcontroller attempt to drive the reset line. Figure 17 shows the
connection of the TPS3839K33 with a microcontroller using a series resistor to drive a bidirectional reset line.
Figure 17. Connection to Bidirectional Reset Pin
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