Datasheet

1
1
J1
J2
J3
U1
C1
JP1
www.ti.com
Board Layout
4 Board Layout
Figure 1. Assembly Layer
Figure 2. Top Layer Routing
Figure 3. Bottom Layer Routing
3
SLVU774September 2012 TPS3831G33EVM-187 Evaluation Module
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated