Datasheet

Time
0.8V
0.0V
V
IT
+ V
HYS
V
IT
0.7V
DD
0.3V
DD
MR
SENSE
RESET
V
DD
t
D
t
D
t
D
t
D
= Reset Delay
= Undefined State
TRUTH TABLE
TPS3808
www.ti.com .......................................................................................................................................................... SBVS050J – MAY 2004 – REVISED AUGUST 2008
TIMING DIAGRAM
Figure 2. TPS3808 Timing Diagram Showing MR and SENSE Reset Timing
MR SENSE > V
IT
RESET
L 0 L
L 1 L
H 0 L
H 1 H
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