Datasheet

TPS3700
www.ti.com SBVS187C –FEBRUARY 2012–REVISED MAY 2013
GENERAL DESCRIPTION
The TPS3700 combines two comparators for over- and undervoltage detection. The TPS3700 is a wide-supply
voltage range (1.8 V to 18 V) device with a high-accuracy rising input threshold of 400 mV (1% over temperature)
and built-in hysteresis. The outputs are also rated to 18 V and can sink up to 40 mA.
The TPS3700 is designed to assert the output signals, as shown in Table 1. Each input pin can be set to monitor
any voltage above 0.4 V using an external resistor divider network. With the use of two input pins of different
polarities, the TPS3700 forms a window comparator. Broad voltage thresholds can be supported that allow the
device to be used in a wide array of applications.
Table 1. TPS3700 Truth Table
CONDITION OUTPUT STATUS
INA+ > V
ITP
OUTA high Output A not asserted
INA+ < V
ITN
OUTA low Output A asserted
INB– > V
ITP
OUTB low Output B asserted
INB– < V
ITN
OUTB high Output B not asserted
INPUTS (INA+, INB–)
The TPS3700 combines two comparators. Each comparator has one external input (inverting and noninverting);
the other input is connected to the internal reference. The comparator rising threshold is designed and trimmed
to be equal to the reference voltage (400 mV). Both comparators also have a built-in falling hysteresis that
makes the device immune to supply rail noise and ensures stable operation.
The comparator inputs can swing from ground to 6.5 V, regardless of the device supply voltage used. Although
not required in most cases, it is good analog design practice to place a 1-nF to 10-nF bypass capacitor at the
comparator input for extremely noisy applications in order to reduce sensitivity to transients and layout parasitics.
For comparator A, the corresponding output (OUTA) is driven to logic low when the input INA+ voltage drops
below (V
ITP
– V
HYS
). When the voltage exceeds V
ITP
, the output (OUTA) goes to a high-impedance state; see
Figure 2.
For comparator B, the corresponding output (OUTB) is driven to logic low when the voltage at input INB–
exceeds V
ITP
. When the voltage drops below V
ITP
– V
HYS
the output (OUTB) goes to a high-impedance state; see
Figure 2. Together, these comparators form a window-detection function as discussed in the Window
Comparator section.
OUTPUTS (OUTA, OUTB)
In a typical TPS3700 application, the outputs are connected to a reset or enable input of the processor [such as
a digital signal processor (DSP), central processing unit (CPU), field-programmable gate array (FPGA), or
application-specific integrated circuit (ASIC)] or the outputs are connected to the enable input of a voltage
regulator [such as a dc-dc or low-dropout regulator (LDO)].
The TPS3700 provides two open-drain outputs (OUTA and OUTB); pull-up resistors must be used to hold these
lines high when the output goes to high impedance (not asserted). By connecting pull-up resistors to the proper
voltage rails, the outputs can be connected to other devices at correct interface voltage levels. The TPS3700
outputs can be pulled up to 18 V, independent of the device supply voltage. To ensure proper voltage levels,
some thought should be given while choosing the pull-up resistor values. The pull-up resistor value is determined
by V
OL
, sink current capability, and output leakage current (I
lkg(OD)
). These values are specified in the Electrical
Characteristics table. By using wired-AND logic, OUTA and OUTB can be merged into one logic signal.
Table 1 and the Inputs section describe how the outputs are asserted or de-asserted. Refer to Figure 2 for a
timing diagram that describes the relationship between threshold voltages and the respective output.
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