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Saving Current While Using the Watchdog
t
d
t
d
t
(tout)
V
DD
V
IT
WDI
RESET
t
t
t
Power-Fail Comparator (PFI and PFO)
PFI PFO
V
CC
GND
TPS3306
V
(SENSE)
R1
1%
R2
1%
V
PFI,trip
= 1.25 V ×
R
1
+ R
2
R
2
TPS3306-15
TPS3306-18 , TPS3306-20
TPS3306-25 , TPS3306-33
SLVS290C – APRIL 2000 – REVISED DECEMBER 2006
DETAILED DESCRIPTION (continued)
The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily
pulses high, resetting the watchdog counter. For minimum watchdog input current (minimum overall power
consumption), leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once within
7/8 of the watchdog time-out period to reset the watchdog timer. If instead WDI is externally driven high for the
majority of the time-out period, a current of 5 V/40 k Ω = 125 µ A can flow into WDI.
Figure 1. Watchdog Timing
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The
power-fail-input (PFI) will be compared with an internal voltage reference of 1.25 V. If the input voltage falls
below the power-fail threshold (V
PFI
) of typ. 1.25 V, the power-fail output ( PFO) goes low. If it goes above 1.25 V
plus about 10 mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to
supervise any voltages above 1.25 V. The sum of both resistors should be about 1 M Ω , to minimize power
consumption and also to assure that the current in the PFI pin can be neglected compared with the current
through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure
minimal variation of sensed voltage. If the power-fail comparator is unused, connect PFI to ground and leave
PFO unconnected.
5
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