Datasheet

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t
t
t
t
d
t
d
t
d
RESET Because of
Power-Down
RESET Because of WDI
RESET Because of a Power Drop Below V
IT–
RESET Because of Power-Up
t
t(out)
SENSEn
V
(nom)
V
IT
1.1 V
WDI
1
0
RESET
1
0
Undefined
Behavior
Undefined
Behavior
DETAILED DESCRIPTION
Watchdog
TPS3306-15
TPS3306-18 , TPS3306-20
TPS3306-25 , TPS3306-33
SLVS290C – APRIL 2000 – REVISED DECEMBER 2006
TIMING DIAGRAM
Table 4. Terminal Functions
TERMINAL
NAME NO. I/O DESCRIPTION
GND 4 I Ground
PFI 3 I Power-fail comparator input
PFO 6 O Power-fail comparator output, open-drain
RESET 5 O Active-low reset output, open-drain
SENSE1 1 I Sense voltage input 1
SENSE2 2 I Sense voltage input 2
WDI 7 I Watchdog timer input
V
DD
8 I Supply voltage
In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also
important to ensure correct program execution. The task of a watchdog is to ensure that the program is not
stalled in an indefinite loop. The microprocessor, microcontroller, or DSP typically has to toggle the watchdog
input within 0.8 s to avoid a time-out occurring. Either a low-to-high or a high-to-low transition resets the internal
watchdog timer. If the input is unconnected or tied with a high impedance driver, the watchdog is disabled and
will be retriggered internally.
4
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