Datasheet

 
 

SLVS367A − MARCH 2001 − REVISED JUNE 2001
7
www.ti.com
electrical characteristics over recommended operating virtual junction temperature range,
V
CC
= 12 V, ENABLE = High, C
L
= 3.3 nF (unless otherwise noted) (continued)
dead-time control
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
V
IH(LOWDR)
LOWDR high-level input voltage Over full VDRV range See Note 2 50 %VDRV
V
IL(LOWDR)
LOWDR low-level input voltage Over full VDRV range See Note 2 1 V
V
IH(DT)
DT high-level input voltage Over full V
CC
range 2 V
V
IL(DT)
DT low-level input voltage Over full V
CC
range 1 V
Deadtime delay V
(VDRV)
= 4 V to 14 V See Note 2 0.5 1 1.5 ns/pF
Driver nonoverlap time (DT to LOWDR)
V
(VDRV)
= 4.5 V, T
J
= 25°C, See Note 2 30 150 ns
Driver nonoverlap time (DT to LOWDR
)
V
(VDRV)
= 14.5 V, T
J
= 25°C, See Note 2 30 100 ns
Driver nonoverlap time (LOWDR to
V
(VDRV)
= 4.5 V, C
L(Delay)
= 50 pF
T
J
= 25°C, See Note 2
75 180
ns
Driver nonoverlap time (LOWDR to
HIGHDR)
V
(VDRV)
= 14.5 V, C
L(Delay)
= 50 pF
T
J
= 25°C, See Note 2
58 125
ns
Driver nonoverlap time (LOWDR to
V
(VDRV)
= 4.5 V, C
L(Delay)
= 0 pF
T
J
= 25°C, See Note 2
50 125
ns
Driver nonoverlap time (LOWDR to
HIGHDR)
V
(VDRV)
= 14.5 V, C
L(Delay)
= 0 pF
T
J
= 25°C, See Note 2
30 100
ns
NOTE 2: Ensured by design, not production tested.
high-side driver
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
(BOOT)
−V
(BOOTLO)
= 4 V,
V
(HIGHDR)
= 0.5 V (src) 1 1.3
V
(BOOT)
−V
(BOOTLO)
= 4 V,
See Note 2
V
(HIGHDR)
= 4 V (sink) 2 2.4
Peak output current
V
(BOOT)
−V
(BOOTLO)
= 8 V,
V
(HIGHDR)
= 0.5 V (src) 2 2.4
A
Peak output current
V
(BOOT)
−V
(BOOTLO)
= 8 V,
See Note 2
V
(HIGHDR)
= 8 V (sink) 2 3.3
A
V
(BOOT)
−V
(BOOTLO)
= 14 V,
V
(HIGHDR)
= 0.5 V (src) 2 3.9
V
(BOOT)
−V
(BOOTLO)
= 14 V,
See Note 2
V
(HIGHDR)
= 14 V (sink) 2 4.4
V
(BOOT)
−V
(BOOTLO)
= 4.5 V
V
(HIGHDR)
= 4 V (src) 45
V
(BOOT)
−V
(BOOTLO)
= 4.5 V
T
J
= 25°C
V
(HIGHDR)
= 0.5 V (sink) 6
r
o
Output resistance
V
(BOOT)
−V
(BOOTLO)
= 7.5 V,
V
(HIGHDR)
= 7 V (src) 26
Ω
r
o
Output resistance
V
(BOOT)
−V
(BOOTLO)
= 7.5 V,
T
J
= 25°C
V
(HIGHDR)
= 0.5 V (sink) 5
Ω
V
(BOOT)
−V
(BOOTLO)
= 11.5 V,
V
(HIGHDR)
= 11 V (src) 20
V
(BOOT)
−V
(BOOTLO)
= 11.5 V,
T
J
= 25°C
V
(HIGHDR)
= 0.5 V (sink) 4
HIGHDRV-to-BOOTLO resistor 250 kΩ
C
L
= 3.3 nF, V
(BOOTLO)
= GND,
V
(BOOT)
= 4 V 85
C
L
= 3.3 nF, V
(BOOTLO)
= GND
,
T
J
= 125
°
C
V
(BOOT)
= 8 V 70
t
r
/t
f
Rise and fall time
T
J
= 125°C
V
(BOOT)
= 14 V 65
ns
t
r
/t
f
Rise and fall time
(see Notes 2 and 3)
C
L
= 10 nF, V
(BOOTLO)
= GND,
V
(BOOT)
= 4 V 170
ns
(see Notes 2 and 3)
C
L
= 10 nF, V
(BOOTLO)
= GND,
T
J
= 125
°
C
V
(BOOT)
= 8 V 140
T
J
= 125°C
V
(BOOT)
= 14 V 100
Propagation delay time,
V
(BOOTLO)
= GND, T
J
= 125°C,
V
(BOOT)
= 4 V 120
t
PHL
Propagation delay time,
HIGHDR going low
(excluding deadtime)
V
(BOOTLO)
= GND, T
J
= 125°C
,
See Notes 2 and 3
V
(BOOT)
= 8 V 100
ns
t
PHL
HIGHDR going low
(excluding deadtime)
See Notes 2 and 3
V
(BOOT)
= 14 V 80
ns
NOTES: 2: Ensured by design, not production tested.
3. The pullup/pulldown circuits of the drivers are bipolar and MOSFET transistors in parallel. The peak output current rating is the
combined current from the bipolar and MOSFET transistors. The output resistance is the r
DS(on)
of the MOSFET transistor when
the voltage on the driver output is less than the saturation voltage of the bipolar transistor.