Datasheet

 
   
  
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating virtual junction temperature range,
V
CC
= 6.5 V, C
L
= 3.3 nF (unless otherwise noted) (continued)
output drivers
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
High-side sink
Duty cycle < 2%,
V
BOOT
– V
BOOTLO
= 4.5 V, V
HIGHDR
= 4 V 0.7 1.1
High-side sink
(see Note 4)
Duty cycle < 2%,
t
pw
< 100 µs
(see Note 3)
V
BOOT
– V
BOOTLO
= 6.5 V, V
HIGHDR
= 5 V 1.1 1.5
A
(see Note 4)
t
pw
< 100 µs
(see Note 3)
V
BOOT
– V
BOOTLO
= 12 V, V
HIGHDR
= 10.5 V 2 2.4
A
High-side
Duty cycle < 2%,
V
BOOT
– V
BOOTLO
= 4.5 V, V
HIGHDR
= 0.5V 1.2 1.4
High-side
source
(see Note 4)
Duty cycle < 2%,
t
pw
< 100 µs
(see Note 3)
V
BOOT
– V
BOOTLO
= 6.5 V, V
HIGHDR
= 1.5 V 1.3 1.6
A
Peak output-
source
(see Note 4)
t
pw
< 100 µs
(see Note 3)
V
BOOT
– V
BOOTLO
= 12 V, V
HIGHDR
= 1.5 V 2.3 2.7
A
Peak output-
current
Low-side sink
Duty cycle < 2%,
V
CC
= 4.5 V, V
LOWDR
= 4 V 1.3 1.8
current
Low-side sink
(see Note 4)
Duty cycle < 2%,
t
pw
< 100 µs
(see Note 3)
V
CC
= 6.5 V, V
LOWDR
= 5 V 2 2.5
A
(see Note 4)
t
pw
< 100 µs
(see Note 3)
V
CC
= 12 V, V
LOWDR
= 10.5 V 3 3.5
A
Low-side
Duty cycle < 2%,
V
CC
= 4.5 V, V
LOWDR
= 0.5V 1.4 1.7
Low-side
source
(see Note 4)
Duty cycle < 2%,
t
pw
< 100 µs
(see Note 3)
V
CC
= 6.5 V, V
LOWDR
= 1.5 V 2 2.4
A
source
(see Note 4)
t
pw
< 100 µs
(see Note 3)
V
CC
= 12 V, V
LOWDR
= 1.5 V 2.5 3
A
V
BOOT
– V
BOOTLO
= 4.5 V, V
HIGHDR
= 0.5 V 5
High-side sink (see Note 4)
V
BOOT
– V
BOOTLO
= 6.5 V, V
HIGHDR
= 0.5 V 5
Ω
High-side sink (see Note 4)
V
BOOT
– V
BOOTLO
= 12 V, V
HIGHDR
= 0.5 V 5
Ω
V
BOOT
– V
BOOTLO
= 4.5 V, V
HIGHDR
= 4 V 75
High-side source (see Note 4)
V
BOOT
– V
BOOTLO
= 6.5 V, V
HIGHDR
= 6 V 75
Ω
Output
High-side source (see Note 4)
V
BOOT
– V
BOOTLO
= 12 V, V
HIGHDR
=11.5 V 75
Ω
Output
resistance
V
DRV
= 4.5 V, V
LOWDR
= 0.5 V 9
resistance
Low-side sink (see Note 4)
V
DRV
= 6.5 V V
LOWDR
= 0.5 V 7.5
Ω
Low-side sink (see Note 4)
V
DRV
= 12 V, V
LOWDR
= 0.5 V 6
Ω
V
DRV
= 4.5 V, V
LOWDR
= 4 V 75
Low-side source (see Note 4)
V
DRV
= 6.5 V, V
LOWDR
= 6 V 75
Ω
Low-side source (see Note 4)
V
DRV
= 12 V, V
LOWDR
= 11.5 V 75
Ω
NOTES: 3. Ensured by design, not production tested.
4. The pull-up/pull-down circuits of the drivers are bipolar and MOSFET transistors in parallel. The peak output current rating is the
combined current from the bipolar and MOSFET transistors. The output resistance is the Rds(on) of the MOSFET transistor when
the voltage on the driver output is less than the saturation voltage of the bipolar transistor.
dead time
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IH
High-level input voltage
LOWDR
Over the V
CC
range (see Note 3)
0.7V
CC
V
V
IL
Low-level input voltage
LOWDR Over the V
CC
range (see Note 3)
1
V
V
IH
High-level input voltage
DT
Over the V
CC
range
0.7V
CC
V
V
IL
Low-level input voltage
DT
Over the V
CC
range
1
V
NOTE 3: Ensured by design, not production tested.
digital control terminals
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IH
High-level input voltage
Over the V
CC
range
0.7V
CC
V
V
IL
Low-level input voltage
Over the V
CC
range
1 V