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SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Floating Bootstrap or Ground-Reference

High-Side Driver

D Adaptive Dead-Time Control

D 50-ns Max Rise/Fall Times and 100-ns Max

Propagation Delay − 3.3-nF Load

D Ideal for High-Current Single or Multiphase

Power Supplies

D 2.4-A Typical Peak Output Current

D 4.5-V to 15-V Supply Voltage Range

D Internal Schottky Bootstrap Diode

D Low Supply Current....3-mA Typical

D −40°C to 125°C Operating Virtual Junction

Temperature

D Available in SOIC Package

description

The TPS2832 and TPS2833 are MOSFET drivers for synchronous-buck power stages. These devices are ideal

for designing a high-performance power supply using switching controllers that do not have MOSFET drivers.

The drivers are designed to deliver 2.4-A peak currents into large capacitive loads. The high-side driver can be

configured as a ground-reference driver or as a floating bootstrap driver. An adaptive dead-time control circuit

eliminates shoot-through currents through the main power FETs during switching transitions and provides high

efficiency for the buck regulator.

The TPS2832 has a noninverting input. The TPS2833 has an inverting input. The TPS2832/33 drivers, available

in 8-terminal SOIC packages, operate over a junction temperature range of −40°C to 125°C.

AVAILABLE OPTIONS

PACKAGED DEVICES

SOIC

(D)

−40°C to 125°C

TPS2832D

TPS2833D

The D package is available taped and reeled. Add R

suffix to device type (e.g., TPS2832DR)

Related Synchronous MOSFET Drivers

DEVICE NAME ADDITIONAL FEATURES INPUTS

TPS2830

ENABLE, SYNC and CROWBAR

CMOS

Noninverted

TPS2831

ENABLE, SYNC and CROWBAR CMOS

Inverted

TPS2834

ENABLE, SYNC and CROWBAR

TTL

Noninverted

TPS2835

ENABLE, SYNC and CROWBAR TTL

Inverted

TPS2836

W/O ENABLE, SYNC and CROWBAR

TTL

Noninverted

TPS2837

W/O ENABLE, SYNC and CROWBAR TTL

Inverted

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

D PACKAGE

(TOP VIEW)

PGND

BOOT

HIGHDR

BOOTLO

LOWDR

Summary of content (16 pages)

PAGE 1
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 D Floating Bootstrap or Ground-Reference D D D D D D D D D D PACKAGE (TOP VIEW) High-Side Driver Adaptive Dead-Time Control 50-ns Max Rise/Fall Times and 100-ns Max Propagation Delay − 3.3-nF Load Ideal for High-Current Single or Multiphase Power Supplies 2.4-A Typical Peak Output Current 4.5-V to 15-V Supply Voltage Range Internal Schottky Bootstrap Diode Low Supply Current....
PAGE 2
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 functional block diagram 4 8 7 (TPS2832 Only) 6 VCC BOOT HIGHDR BOOTLO 1 IN VCC (TPS2833 Only) 5 2 LOWDR PGND 3 DT Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION BOOT 8 I Bootstrap terminal. A ceramic capacitor is connected between BOOT and BOOTLO terminals to develop the floating bootstrap voltage for the high-side MOSFET.
PAGE 3
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 detailed description low-side driver The low-side driver is designed to drive low Rds(on) N-channel MOSFETs. The current rating of the driver is 2 A, source and sink. high-side driver The high-side driver is designed to drive low Rds(on) N-channel MOSFETs. The current rating of the driver is 2 A, source and sink.
PAGE 4
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 16 V Input voltage range: BOOT to PGND (high-side driver ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 30 V BOOTLO to PGND . . . . . . . .
PAGE 5
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 electrical characteristics over recommended operating virtual junction temperature range, VCC = 6.5 V, CL = 3.
PAGE 6
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 switching characteristics over recommended operating virtual junction temperature range, CL = 3.
PAGE 7
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 TYPICAL CHARACTERISTICS FALL TIME vs SUPPLY VOLTAGE RISE TIME vs SUPPLY VOLTAGE 50 50 CL = 3.3 nF TJ = 25°C 45 40 40 t f − Fall Time − ns t r − Rise Time − ns CL = 3.3 nF TJ = 25°C 45 High Side 35 30 Low Side 25 35 High Side 30 25 20 20 15 15 10 Low Side 10 4 5 6 7 9 10 11 12 13 8 VCC − Supply Voltage − V 14 15 4 5 6 Figure 1 10 11 12 13 14 15 50 VCC = 6.
PAGE 8
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 TYPICAL CHARACTERISTICS HIGH-TO-LOW PROPAGATION DELAY TIME vs SUPPLY VOLTAGE, HIGH TO LOW LEVEL 150 t PHL − High-to-Low Propagation Delay Time − ns t PLH − Low-to-High Propagation Delay Time − ns LOW-TO-HIGH PROPAGATION DELAY TIME vs SUPPLY VOLTAGE, LOW TO HIGH LEVEL CL = 3.
PAGE 9
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 TYPICAL CHARACTERISTICS FALL TIME vs LOAD CAPACITANCE RISE TIME vs LOAD CAPACITANCE 1000 1000 VCC = 6.5 V TJ = 25°C t f − Fall Time − ns t r − Rise Time − ns VCC = 6.5 V TJ = 25°C 100 High Side Low Side 10 1 0.1 1 10 100 High Side Low Side 10 1 0.
PAGE 10
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 TYPICAL CHARACTERISTICS PEAK SOURCE CURRENT vs SUPPLY VOLTAGE PEAK SINK CURRENT vs SUPPLY VOLTAGE 4 4 TJ = 25°C TJ = 25°C 3.5 3 3 Low Side Peak Sink Current − A Peak Source Current − A 3.5 2.5 2 High Side 1.5 Low Side 2.5 2 High Side 1.5 1 1 0.5 0.
PAGE 11
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 APPLICATION INFORMATION Figure 16 shows the circuit schematic of a 100-kHz synchronous-buck converter implemented with a TL5001A pulse-width-modulation (PWM) controller and a TPS2833 driver. The converter operates over an input range from 4.5 V to 12 V and has a 3.3 V output. The circuit can supply 3 A continuous load and the transient load is 5 A.
PAGE 12
SLVS195C − FEBRUARY 1999 − REVISED JANUARY 2001 APPLICATION INFORMATION Great care should be taken when laying out the pc board. The power-processing section is the most critical and will generate large amounts of EMI if not properly configured. The junction of Q1, Q2, and L1 should be very tight.
PAGE 13
PACKAGE OPTION ADDENDUM www.ti.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 31-Dec-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS2832DR Package Package Pins Type Drawing SOIC D 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
PAGE 15
PACKAGE MATERIALS INFORMATION www.ti.com 31-Dec-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2832DR SOIC D 8 2500 340.5 338.1 20.
PAGE 16
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