Datasheet

1
2
3
4
8
7
6
5
UGATE
BOOT
PWM
GND
PHASE
EN/PG
VDD
LGATE
5
3
7
6
81
2BOOT
PWM VDD
EN/PG
LGAT EGND
U G AT E PHASE
4
Exposed
Thermal
Die Pad
6
13K
2
VDD
EN/PG
BOOT
UGATE
PHASE
LGATE
GND
7
1
8
5
4
VDD
27K
3-STATE
INPUT
CIRCUIT
PWM
3
SHOOT-
THROUGH
PROTECTION
THERMAL
SD
HLD-OFF
TIME
UVLO
TPS28225
TPS28226
SLUS710C –MAY 2006–REVISED APRIL 2010 www.ti.com
DEVICE INFORMATION
SOIC-8 Package (top view)
DRB-8 Package (top view)
BLOCK DIAGRAM
A. For the TPS28225DRB device the thermal PAD on the bottom side of package must be soldered and connected to
the GND pin and to the GND plane of the PCB in the shortest possible way. See Recommended Land Pattern in the
Application section.
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Product Folder Link(s): TPS28225 TPS28226