Datasheet

TPS28225
TPS28226
SLUS710C –MAY 2006–REVISED APRIL 2010 www.ti.com
The schematic of one of the phases in a multi-phase synchronous buck regulator and the related layout are
shown in Figure 27 and Figure 28. These help to illustrate good design practices. The power stage includes one
high-side MOSFET Q10 and two low-side MOSFETS (Q8 and Q9). The driver (U7) is located on bottom side of
PCB close to the power MOSFETs. The related switching waveforms during turning ON and OFF of upper FET
are shown in Figure 29 and Figure 30. The dead time during turning ON is only 10ns (Figure 29) and 22ns during
turning OFF (Figure 30).
Figure 28. Component Placement Based on Schematic in Figure 27
Figure 29. Phase Rising Edge Switching Waveforms (20ns/div) of the Power Stage in Figure 27
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