Datasheet
SLVS132F − NOVEMBER 1995 − REVISED OCTOBER 2004
15
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APPLICATION INFORMATION
matching and paralleling connections
Figures 21 and 22 show the delays for the rise and fall time of each channel. As can be seen on a 5-ns scale, there
is very little difference between the two channels at no load. Figures 23 and 24 show the difference between the two
channels for a 1-nF load on each output. There is a slight delay on the rising edge, but little or no delay on the falling
edge. As an example of extreme overload, Figures 25 and 26 show the difference between the two channels, or two
drivers in the package, each driving a 10-nF load. As would be expected, the rise and fall times are significantly slowed
down. Figures 28 and 29 show the effect of paralleling the two channels and driving a 1-nF load. A noticeable
improvement is evident in the rise and fall times of the output waveforms. Finally, Figures 30 and 31 show the two
drivers being paralleled to drive the 10-nF load and as could be expected the waveforms are improved. In summary,
the paralleling of the two drivers in a package enhances the capability of the drivers to handle a larger load. Because
of manufacturing tolerances, it is not recommended to parallel drivers that are not in the same package.
Regulator
50 Ω
1
2
3
4
8
7
6
5
1 nF
Output
0.1 µF 4.7 µF
+
V
CC
TPS2811
Figure 19. Test Circuit for Measuring Switching Characteristics
Regulator
50 Ω
1
2
3
4
8
7
6
5
C
L(2)
C
L(1)
Output 1
0.1 µF 4.7 µF
+
V
CC
TPS2811
NOTE A: Input rise and fall times should be ≤10 ns for accurate measurement of ac parameters.
Output 2
Figure 20. Test Circuit for Measuring Switching Characteristics with the Inputs Connected in Parallel