Datasheet

TPS27082L
www.ti.com SLVSBR5B –DECEMBER 2012–REVISED SEPTEMBER 2013
PFET Q1 Minimum Safe Operating Area
(Refer to DISSIPATION RATINGS
(1)(2)(3)
for PC board details )
Figure 8. Q1 SOA at VGS_Q1=-4.5V Figure 9. Q1 SOA at VGS_Q1=-3.0V
Figure 10. Q1 SOA at VGS_Q1=-2.5V Figure 11. Q1 SOA at VGS_Q1=-1.8V
Figure 12. Q1 SOA at VGS_Q1=-1.5V Figure 13. Q1 SOA at VGS_Q1=-1.2V
(1) Maximum dissipation values for retaining a maximum allowable device junction temperature of 150°C
(2) Refer to TI’s design support web page at www.ti.com/thermal for improving device thermal performance
(3) Package thermal data based on a 76x114x1.6mm, 4-layer board with 2-oz Copper on outer layers
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