Datasheet
TPS2540, TPS2540A
TPS2541, TPS2541A
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SLVSAG2C –OCTOBER 2010– REVISED OCTOBER 2011
ELECTRICAL CHARACTERISTICS (continued)
Conditions are -40 ≤ T
J
≤ 125°C unless otherwise noted. V
EN
(if TPS2540 or TPS2540A) = V
DSC
(if TPS2541 or TPS2541A) =
V
IN
= 5 V, R
FAULT
= 10 kΩ, R
ILIM0
= 210 kΩ, R
ILIM1
= 20 kΩ, I
LIM_SEL
= 0 V, CTL1 = CTL2 = GND, CTL3 = V
IN
(TPS2540/40A) or
CTL3 = GND (TPS2541/41A), unless otherwise noted. Positive currents are into pins. Typical values are at 25°C. All voltages
are with respect to GND unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DCP Shorted Mode Charger Interface
DP_IN/DM_IN shorting
R
DPM_short
CTLx configured for DCP BC1.2 125 200 Ω
resistance
Discharge resistance
R
DCHG_PW
DM_IN and DP_IN to CTLx configured for DCP BC1.2 2 3.2 6 MΩ
GND
Divider Mode Charger Interface
V
DP_AM
DP_IN output voltage 1.9 2 2.1
V
V
DM_AM
DM_IN output voltage 2.57 2.7 2.84
CTLx configured for divider mode
Z
OUT_DP
DP_IN output impedance 8 10 12.5
kΩ
Z
OUT_DM
DM_IN output impedance 8 10 12.5
CDP Interface
Voltage source on
V
DM_SRC
V
DP_IN
= 0.6 V, CTLx configured for CDP 0.5 0.6 0.7
DM_IN for CDP detect
V
DP_IN rising voltage
V
DAT_REF
threshold to activate 0.25 0.4
V
DM_SRC
V
DAT_REF
hysteresis 50 mV
I
DM_IN
= - 250 µA, CTLx configured for CDP
DP_IN rising voltage
V
LGC_SRC
threshold to deactivate 0.8 1 V
V
DM_SRC
V
LGC_SRC
hysteresis 100 mV
I
DP_SINK
DP_IN sink current 0.4 V ≤V
DP_IN
≤ 0.8 V, CTLx configured for CDP operation 50 150 µA
Timings
DM_IN voltage source From V
DP_IN
= 0 -> 0.6 V to V
DM_IN
= V
DM_SRC
, CTLx
t
VDMSRC_EN
1 10
enable time, CDP mode configured for CDP
DM_IN voltage source From V
DP_IN
= 0.6 V -> 0 V to V
DM_IN
= 0 V, CTLx configured
t
VDMSRC_DIS
10
disable time, CDP mode for CDP
ms
Time for OUT to be
reapplied after V
OUT
falls Any transition to and from CDP, or to and from SDP. Also
t
VBUS_REAPP
200 500
below 0.7 V during during Auto-detect to shorted mode.
discharge
Timing Requirements
Session valid (IN high) to
t
SLVD_CON_P
TPS2540/TPS2541 1
VDP_SRC in DCP mode
s
When VBUS is high, (TPS2540, TPS2541) 0.9
Low DP_IN period in
t
DCPLOW
DCP mode
When VBUS is high, (TPS2540A, TPS2541A) 9
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Product Folder Link(s): TPS2540, TPS2540A TPS2541, TPS2541A