Datasheet

TPS2492
TPS2493
SLUSA65C JULY 2010REVISED JANUARY 2013
www.ti.com
PRODUCT INFORMATION
(1)
TEMPERATURE FUNCTION PACKAGE PART NUMBER
Latched TPS2492PW
-40°C to 125°C PW14
Retry TPS2493PW
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder on www.ti.com.
ABSOLUTE MAXIMUM RATINGS
(1)
over recommended T
J
and voltages with respect to GND (unless otherwise noted)
VALUE UNIT
VCC, SENSE, UVEN, OUT -0.3 to 100
Input voltage range
PROG, OV -0.3 to 6
VCC – SENSE Differential voltage -1.5 to 1.5 V
GATE, PG, FLT -0.3 to 100
Output voltage range
TIMER, VREF, IMON -0.3 to 6
PG, FLT 10
Sink current
PROG 2 mA
VREF Source current 2
HBM 2
ESD rating kV
CDM 0.5
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
THERMAL METRIC
(1)
VALUE UNITS
θ
JA
Junction-to-ambient thermal resistance
(2)
116.4
θ
JB
Junction-to-board thermal resistance
(3)
53.8
°C/W
ψ
JT
Junction-to-top characterization parameter
(4)
1.4
ψ
JB
Junction-to-board characterization parameter
(5)
58.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(5) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
RECOMMENDED OPERATING CONDITIONS
over recommended T
J
and voltages with respect to GND (unless otherwise noted)
MIN NOM MAX UNIT
VCC 9 80
Input voltage range V
PROG 0.4 4
Sourcing current 0 1 mA
VREF
capacitive loading 0 1000 pF
IMON Sourcing current 1.9 mA
T
J
Junction operating temperature -40 125 °C
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