Datasheet

TPS2492
TPS2493
SLUSA65C –JULY 2010–REVISED JANUARY 2013 www.ti.com
The TPS2492/93 responds rapidly to a short circuit as seen in Figure 17. The falling OUT voltage is the result of
the external FET and C
O
currents through the short circuit impedance. The internal GATE clamp causes the
GATE voltage to follow the output voltage down and subsequently limits the negative V
GS
. The I
IN
waveform
includes current into an input 47 µF capacitor. M1 drain current has a peak value in excess of the waveform, and
terminates when V
GATE
approaches V
OUT
. The rapidly rising fault current overdrives the GATE amplifier causing it
to overshoot and rapidly turn the external FET off by sinking current to ground. At a time beyond the extent of
Figure 17, but within the scope of Figure 15, the FET will be slowly turned back on as the GATE amplifier
recovers. The operating point will settle to the current or power limit, and finally the TIMER will expire and the
FET will turn off.
Limited input voltage overshoot appears in Figure 17 because a local 47-μF bypass capacitor and 1000 μF
distribution capacitor were used. The input voltage overshoots as the input current abruptly drops due to the
stored energy in the input wiring inductance. The exact waveforms seen in an application depend upon many
factors including parasitics of the voltage distribution, circuit layout, and the short itself.
Figure 17. Current Limit Onset
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