Datasheet

TPS 2492

MOSFET

PROG

ENABLE

STATUS

IMON

VIN VOUT

GNDGND

EVM Block Diagram TPS2492EVM-491

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2.7.2 dv/dt Control

When the VPROG calculates below the 0.4 V minimum, one option is to use dv/dt control to start the

uncharged output capacitor. In this way, the power limiting is not used on power up. R11 and C4, (see

schematic Figure 2 for component reference), are normally not populated and control the power turn on

with a dv/dt soft start. Recommendation for R11 is at 1 kΩ. C4 can be calculated by knowing the output

capacitor, selecting the charge current and calculating the start time. Calculation is done by the capacitor

V I relationship equation, I = C dv/dt.

• Assume a 12-V system with a 1000-µF output capacitor. Select the charge at 0.5 A. Use the formula to

solve for time. T = CV/I, T = 24 ms.

• Since the output FET is a gate follower, the time calculated applies to the gate rise time. Use the same

formula to solve for Ct but this time the current is the gate sourcing current in the datasheet

specifications section, 22 µA nominal.

• The voltage, again from the datasheet is the output VGS, 14 V.

• Ct = IT / V = 22 µA x 24 ms / 14 = 37.7 nF, use standard value 39 nF.

2.7.3 Disable Power Limit

It’s not usually done, but sometimes because of high voltage with high current the power limit may be

disabled on over load. TPS2492 can be configured to run in current limit only. To disable power limit

remove R3 and install 47 kΩ in R2, (see schematic Figure 2 for component reference). With power limit

disabled, dv/dt start outlined in the previous section would be used for power on.

3 EVM Block Diagram TPS2492EVM-491

Figure 1. EVM Block Diagram

Using the TPS2492/3 Hot Swap Controller SLUU425A– May 2010– Revised March 2011

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