Datasheet

VCC − OUT

10V/div

VOUT10V/div

1A/div

FETPWR10W/div

M1PowerMeasured29.6W,

Calculated34.4W

t-Time-2ms/div

TPS2490

TPS2491

SLVS503D –NOVEMBER 2003–REVISED JULY 2012

www.ti.com

Action of the Constant Power Engine (Figure 14)

The calculated power dissipated in M1, V

×I

, is computed under the same startup conditions as Figure 13 .

The current of M1, labeled I

, initially rises to the value that satisfies the constant power engine; in this case it is

34 W ÷ 48 V = 0.7 A. The 34 W value is programmed into the engine by setting the PROG voltage using the

equation given in the PROG pin description. V

of M1, which is calculated as V

(SENSE–OUT)

, falls as C

charges,

thus allowing the M1 drain current to increase . This is the result of the internal constant power engine adjusting

the current limit reference to the GATE amplifier as C

charges and V

falls. The calculated device power in

Figure 14, labeled FET PWR, is seen to be flat-topped and constant within the limitations of circuit tolerance and

acquisition noise. A fixed current limit is implemented by clamping the constant power engine’s output to 50 mV

when V

is low. This protection technique can be viewed as a specialized form of foldback limiting; the benefit

over linear foldback is that it yields the maximum output current from a device over the full range of V

and still

protects the device.

Figure 14. Computation of M1 Stress During Startup

Response to a Hard Output Short (Figure 15 and Figure 16)

Figure 15 shows the short circuit response over the full time-out period. The period begins when the output

voltage falls and ends when M1 is turned off. M1 current is actively controlled by the constant power engine and

gate amplifier circuit while the TIMER pin charges C

to the 4 V threshold causing M1 to be turned off. The

TPS2490 latches off after the threshold is reached until either the input voltage drops below the UVLO threshold

or EN cycles through the false (low) state. The TPS2491 goes through a timing sequence before attempting a

restart.