Datasheet

1
2
3
4
5
6
7
8
9
10
SDA
SDL
NC
VS
NC
EN
VREF
PROG
TIMER
GND
20
19
18
17
16
15
14
13
12
11
A0
A1
VINM
VINP
GND
VCC
SENSE
GATE
OUT
PG
TPS2480/81
TPS2480
TPS2481
www.ti.com SLUS939B –APRIL 2010–REVISED DECEMBER 2010
20-Pin TSSOP
Table 1. TERMINAL FUNCTIONS
FUNCTION TPS2480/81 DESCRIPTION
SDA 1 I
2
C Data Line
SCL 2 I
2
C Clock
NC 3 Tie to GND or float
VS 4 Power input to the I
2
C block, 3.3 V to 5 V
NC 5 No connection, tie to GND or float
EN 6 Device enable
VREF 7 Reference voltage output, used to set power threshold on PROG pin
PROG 8 Power-limit setting input
TIMER 9 Fault timing capacitor
GND 10 GND
PG 11 Power good reporting output, open-drain
OUT 12 Output voltage feedback
GATE 13 Gate output
SENSE 14 Current-limit sense input
VCC 15 Main power supply input to device and FET
GND 16 GND
VINP 17 Positive differential shunt voltage. Connect to positive side of shunt resistor
Negative differential shunt voltage. Connect to negative side of shunt resistor. Bus voltage is
VINM 18
measured from this pin to GND
A1 19 Address pin. Table 2 shows pin settings and corresponding addresses.
A0 20 Address pin. Table 2 shows pin settings and corresponding addresses.
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