Datasheet

15
8
6
10
9
7
13
12
11
1
2
20
19
+
+
Enable
UVLO
Enable
POR
EN
GND
1.35V/
1.25V
8.4V/
8.3V
14SENSE
S
S
+
2.7V/
1.25V
PROG
VCC
Enable
Inrush complete
9-ms
Deglitch
TIMER
PG
OUT
Fault
Logic
+
25m A
2.5m A
4V/1V
+
14V
GATE
2mA
Charge
Pump
22m A
Gate Control
Amplifier
4V
Reference
VREF
Constant
Power
Engine
Voltage Register
Current Register
Power RegisterX
I2C
Interface
4
16
18
17
PGA ADC
A1
A0
SCL
SDA
VS
VINM
VINP
GND
A
B
A
2B
50mV max
V(DS) Detector
I(D) Detector
For autoretry option
with duty cycle of 75%
TPS2480
TPS2481
www.ti.com SLUS939B –APRIL 2010–REVISED DECEMBER 2010
DEVICE INFORMATION
Functional Block Diagram
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