Datasheet

TPS2480
TPS2481
SLUS939B –APRIL 2010–REVISED DECEMBER 2010 www.ti.com
SADC: SADC Shunt ADC Resolution/Averaging
Bits 3–6 These bits adjust the Shunt ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used when
averaging results for the Shunt Voltage Register (01h).
BADC (Bus) and SADC (Shunt) ADC resolution/averaging and conversion time settings are shown in Table 6.
Table 6. ADC Settings
(1)
ADC4 ADC3 ADC2 ADC1 MODE/SAMPLES CONVERSION TIME
0 X
(2)
0 0 9-bit 84 ms
0 X
(2)
0 1 10-bit 148 ms
0 X
(2)
1 0 11-bit 276 ms
0 X
(2)
1 1 12-bit 532 ms
1 0 0 0 12-bit 532 ms
1 0 0 1 2 1.06 ms
1 0 1 0 4 2.13 ms
1 0 1 1 8 4.26 ms
1 1 0 0 16 8.51 ms
1 1 0 1 32 17.02 ms
1 1 1 0 64 34.05 ms
1 1 1 1 128 68.10 ms
(1) Shaded values are default.
(2) X = Don't care.
MODE: Operating Mode
Bits 0–2 Selects continuous, triggered, or power-down mode of operation. These bits default to continuous shunt and bus
measurement mode. The mode settings are shown in Table 7.
Table 7. Mode Settings
(1)
MODE3 MODE2 MODE1 MODE
0 0 0 Power-down
0 0 1 Shunt voltage, triggered
0 1 0 Bus voltage, triggered
0 1 1 Shunt and bus, triggered
1 0 0 ADC off (disabled)
1 0 1 Shunt voltage, continuous
1 1 0 Bus voltage, continuous
1 1 1 Shunt and bus, continuous
(1) Shaded values are default.
46 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS2480 TPS2481