Datasheet

Frame1SMBusALERTResponseAddressByte Frame2SlaveAddressByte
(1)
StartBy
Master
ACKBy
TPS2480/81
From
TPS2480/81
NACKBy
Master
StopBy
Master
1 9 1
9
SDA
SCL
ALERT
0 0 0 1 1 0 0 R/
W 1 0 0 A3 A2 A1 A0 0
NOTE(1):ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.RefertoTable1.
Frame1Two-WireSlaveAddressByte
(1)
Frame2RegisterPointerByte
1
StartBy
Master
ACKBy
TPS2480/81
ACKBy
TPS2480/81
1 9 1 9
SDA
SCL
0 0 A3 A2 A1 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0 Stop
¼
NOTE(1):ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.RefertoTable1.
TPS2480
TPS2481
SLUS939B –APRIL 2010–REVISED DECEMBER 2010 www.ti.com
Figure 22. Timing Diagram for SMBus ALERT
Figure 23. Typical Register Pointer Set
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