Datasheet
Frame1Two-WireSlaveAddressByte
(1)
Frame2RegisterPointerByte
StartBy
Master
ACKBy
TPS2480/81
ACKBy
TPS2480/81
1
9
1
ACKBy
TPS2480/81
1
D15
D14
D13
D12
D11
D10
D9
D8
9
9
SDA
SCL
1 0
0 A3
A2
A1
A0
R/
W
P7
P6
P5
P4
P3
P2
P1
P0
NOTE(1):ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.RefertoTable1.
Frame4DataLSByte
Frame3DataMSByte
ACKBy
TPS2480/81
StopBy
Master
1
D7
D6
D5
D4
D3
D2
D1
D0
9
Frame1Two-WireSlaveAddressByte
(1)
Frame2DataMSByte
(2)
1
StartBy
Master
ACKBy
TPS2480/81
ACKBy
Master
From
TPS2480/81
1
9
1
9
SDA
SCL
0
0
A3
R/
W
D15
D14
D13
D12
D11
D10
D9
D8
A2
A1
A0
Frame3DataLSByte
(2)
Stop
NoACKBy
(3)
Master
From
TPS2480/81
1
9
D7
D6
D5
D4
D3
D2
D1
D0
NOTES:(1)ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.
RefertoTable1.
(2)Readdataisfromthelastregisterpointerlocation.Ifanewregisterisdesired,theregister
pointermustbeupdated.SeeFigure19.
(3)ACKbyMastercanalsobesent.
TPS2480
TPS2481
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SLUS939B –APRIL 2010–REVISED DECEMBER 2010
Figure 20. Timing Diagram for Write Word Format Figure 21. Timing Diagram for Read Word Format
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