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General Configuration and Description

2 General Configuration and Description

2.1 Physical Access

Table 2 lists the TPS2480/1EVM connector functionality, and Table 3 describes the test point availability.

Table 2. Connector Functionality

Connector Label Description

J1/J6 +IN/–IN Power bus input (high-current, screw-down lugs). J1 is +IN and J6 is –IN. Apply bus input voltage

between either J1/J6 or between J3/J8.

J3/J8 +IN/–IN Power bus input (banana jack). J3 is +IN and J8 is –IN. Apply bus input voltage between either J1/J6

or between J3/J8.

J2/J5 +OUT/–OUT Switched bus output (high-current, screw-down lugs). J2 is +OUT and J5 is –OUT. Apply the load

between either J2/J5 or between J4/J7.

J4/J7 +OUT/–OUT Switched bus output (banana jack). J4 is +OUT and J7 is –OUT. Apply the load between either J2/J5

or between J4/J7.

J13 USB USB port. Connect furnished USB cable to PC when using the TPS2480/1 GUI

J9 A1 Allows selection of the A1 I2C address bit. The EVM default is set to address 1000000 by R13/R14.

For other address options, remove R13/R14 and see the table on the schematic.

J10 A0 Allows selection of the A0 I2C address bit. The EVM default is set to address 1000000 by R13/R14.

For other address options remove R13/R14 and see the table on the schematic.

S1 EN Selecting the S1 EN position (toward TP15) allows the TPS2480/1 to enable the MOSFET if the

power bus input is above the turn on voltage. Setting S1 away from the EN position disables the

MOSFET.

J11, J12 For manufacturing use only. Shunts must remain installed in J11 and J12.

Table 3. Test Points

Test Point Color Label Description

TP2 RED +IN Power bus input high.

TP5 BLK –IN Power bus input low.

TP3 ORG +OUT Switched bus output high.

TP4 BLK –OUT Switched bus output low.

TP1 WHT SNS SNS pin test point.

TP6 WHT GATE GATE pin test point.

TP10 WHT PG PG pin (power good) test point.

TP16 WHT TMR TMR pin (timer) test point.

TP18 WHT PRG PROG pin (power program) test point.

TP15 WHT EN EN pin (enable) test point.

TP14 WHT SCL SCL pin (serial clock) test point.

TP13 WHT SDA SDA pin (serial data) test point.

TP12 WHT A1 A1 pin (upper address bit) test point. Level set by R14 and J9.

TP11 WHT A0 A0 pin (lower address bit) test point. Level set by R13 and J10.

TP17 RED 3P3V_USB VS pin (current monitor supply voltage) test point. The USB source applied at J13 powers

the current monitor.

TP19 BLK GND GNDB pin (current monitor ground) test point. The USB source applied at J13 powers the

current monitor.

TP7 WHT HSNS High-voltage (HV) sense test point. TPS2480/1EVM-001 provides a circuit to shift the current

monitor input. This test point mirrors the voltage at TP1.

TP9 WHT LSNS Low-voltage (LV) sense test point. This test point represents the HV to LV mirrored current

sense voltage.

TP8 RED V– Sense voltage mirror negative supply voltage. Normally ~5 V below the power bus high-input

voltage.

D6 GRN USB USB active indicator LED. When a USB power source is presently connected to a PC, this

LED illuminates.

SLUU370A–January 2010–Revised June 2010 TPS2480 and TPS2481 Evaluation Module

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