Datasheet

T FLT
10 μA
C = t
1.35 V
´
SET
LIM
IMON SENSE
0.675 V R
I =
R R
´
´
J(MAX) C(MAX)
LIM
θJC(MAX)
T T
P <
R
-
SET
LIM
PROG SENSE IMON
R
84375
P
R R R
= ´
´
TPS24720
www.ti.com SLVSAL1C –MARCH 2011–REVISED SEPTEMBER 2013
• V
ENSD
is below its threshold.
• V
VCC
drops below the UVLO threshold.
• V
OV
is above its rising threshold.
• Die temperature exceeds the OTSD threshold.
This pin can be left floating when not used.
PROG: A resistor from this pin to GND sets the maximum power permitted in the external MOSFET M
1
during
inrush. Do not apply a voltage to this pin. If the constant power limit is not desired, use a PROG resistor of
4.99 kΩ. To set the maximum power, use Equation 1,
(1)
where P
LIM
is the allowed power limit of MOSFET M
1
. R
SENSE
is the load-current-monitoring resistor connected
between the VCC pin and the SENSE pin. R
PROG
is the resistor connected from the PROG pin to GND. Both
R
PROG
and R
SENSE
are in ohms and P
LIM
is in watts. P
LIM
is determined by the maximum allowed thermal stress of
MOSFET M
1
, given by Equation 2,
(2)
where T
J(MAX)
is the maximum desired transient junction temperature and T
C(MAX)
is the maximum case
temperature prior to a start or restart. R
ӨJC(MAX)
is the junction-to-case thermal impedance of the pass MOSFET
M
1
in units of °C/W. Both T
J(MAX)
and T
C(MAX)
are in °C.
SENSE: This pin connects to the negative terminal of R
SENSE
. It provides a means of sensing the voltage across
this resistor, as well as a way to monitor the drain-to-source voltage across the external FET. The current limit
I
LIM
is set by Equation 3.
(3)
A fast-trip shutdown occurs when V
(VCC – VSENSE)
exceeds 60 mV.
SET: A resistor R
SET
is connected from this pin to the positive terminal of R
SENSE
. This resistor scales the current
limit and power limit settings. It coordinates with R
IMON
and R
SENSE
to determine the current limit value. The value
of R
SET
can be calculated from Equation 3 (see SENSE).
TIMER: A capacitor C
T
connected from the TIMER pin to GND determines the overload fault timing. TIMER
sources 10 µA when an overload is present, and discharges C
T
at 10 µA otherwise. M
1
is turned off when V
TIMER
reaches 1.35 V. In an application implementing auto-retry after a fault, this capacitor also determines the period
before the external MOSFET is re-enabled. A minimum timing capacitance of 1 nF is recommended to ensure
proper operation of the fault timer. The value of C
T
can be calculated from the desired fault time t
FLT
, using
Equation 4.
(4)
As is explained in the description of the LATCH pin, either latch mode or retry mode occurs if the load current
exceeds the current limit threshold or the fast-trip shutdown threshold, depending on the status of the LATCH
pin. While in latch mode, the TIMER pin continues to charge and discharge the attached capacitor periodically. In
retry mode, the external MOSFET is disabled for sixteen cycles of TIMER charging and discharging. The TIMER
pin is pulled to GND by a 2-mA current source at the end of the 16
th
cycle of charging and discharging. The
external MOSFET is then re-enabled. The TIMER pin capacitor, C
T
, can also be discharged to GND during latch
mode or retry mode in the following two ways:
1. A 2-mA current sinks TIMER whenever any of the following occurs:
– V
EN
is below its falling threshold.
– V
VCC
drops below the UVLO threshold.
– V
OV
is above its rising threshold.
2. A 100-kΩ resistor is connected to TIMER and discharges C
T
at the moment when V
ENSD
drops below its
threshold.
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