Datasheet

Partof
TPS24720
M
1
ToLoad
GND
GATE
FromSource
R
GATE
1kΩ
C
GATE
S0509-01
I
30 A
GATE
μ
GATE GATE RS
VCC
t
C I C
V
æ ö
D
= ´ -
ç ÷
è ø
OUT VCC
CHG
C V
t
I
´
D =
TPS24720
SLVSAL1C –MARCH 2011–REVISED SEPTEMBER 2013 www.ti.com
STEP 7. Choose R
GATE
, R
4
, R
5
, R
6
, and C
1
In the typical application diagram on the front page, the gate resistor, R
GATE
, is intended to suppress high-
frequency oscillations. A resistor of 10 Ω serves for most applications, but if M
1
has a C
ISS
below 200 pF, then 33
Ω is recommended. Applications with larger MOSFETs and very short wiring may not require R
GATE
. R
4
, R
5
, and
R
6
are required only if PGb, FLTb, and FFLTb are used; these resistors serve as pullups for the open-drain
output drivers. The current sunk by each of these pins should not exceed 2 mA ( referring to the
RECOMMENDATION OPERATING CONDITIONS table). C
1
is a bypass capacitor to help control transient
voltages, unit emissions, and local supply noise while in the disabled state. Where acceptable, a value in the
range of 0.001 μF to 0.1 μF is recommended.
ALTERNATIVE DESIGN EXAMPLE: GATE CAPACITOR (dV/dt) CONTROL IN INRUSH MODE
The TPS24720 can be used in applications that expect a constant inrush current. This current is controlled by a
capacitor connected from the GATE terminal to GND. A resistor of 1 kΩ placed in series with this capacitor
prevents it from slowing a fast-turnoff event. In this mode of operation, M
1
operates as a source follower, and the
slew rate of the output voltage approximately equals the slew rate of the gate voltage (see Figure 39).
To implement a constant-inrush-current circuit, choose the time to charge, ∆t, using Equation 15,
(15)
where C
OUT
is the output capacitance, V
VCC
is the input voltage, and I
CHG
is the desired charge current. Choose
I
CHG
< P
LIM
/ V
VCC
to prevent power limiting from affecting the desired current.
To select the gate capacitance use Equation 16. I
GATE
is the nominal gate charge current. This equation
assumes that the MOSFET C
GD
is the controlling element as the gate and output voltage rise. C
GD
is non-linear
with applied V
DG
. An averaged estimate may be made using the MOSFET V
GS
vs Q
G
curve. Divide the charge
accumulated during the plateau region by the plateau V
GS
to get C
RS
.
(16)
Figure 39. Gate Capacitor (dV/dt) Control Inrush Mode.
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