Datasheet

TPS24700
TPS24701
SLVSAL3B – MARCH 2011– REVISED MAY 2011 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
DEVICE INFORMATION
T
A
PACKAGE PART NUMBER
(1)
FUNCTION MARKING
TPS24700 Latched 24700
–40ºC to 85ºC MSOP-8
TPS24701 Retry 24701
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range, all voltages referred to GND (unless otherwise noted)
VALUE UNIT
EN, GATE, OUT, PGb
(1)
, SENSE, VCC –0.3 to 30
Input voltage range SENSE to VCC –0.3 to 0.3 V
TIMER –0.3 to 5
Sink current PGb 5 mA
All pins except PGb 2
Human-body model
ESD rating PGb 0.5 kV
Charged-device model 0.5
Temperature Maximum junction, T
J
Internally limited °C
(1) Do not apply voltages directly to these pins.
THERMAL INFORMATION
TPS24700/01
THERMAL METRIC
(1)
UNIT
MSOP (8) PINS
θ
JA
Junction-to-ambient thermal resistance 57.2 °C/W
θ
JCtop
Junction-to-case (top) thermal resistance 110.5 °C/W
θ
JB
Junction-to-board thermal resistance 60.7 °C/W
ψ
JT
Junction-to-top characterization parameter 7.8 °C/W
ψ
JB
Junction-to-board characterization parameter 24 °C/W
θ
JCbot
Junction-to-case (bottom) thermal resistance 14.3 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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Product Folder Link(s): TPS24700 TPS24701